PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 448

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

Philips Semiconductors
Unsigned byte-wise quad maximum
SYNTAX
FUNCTION
DESCRIPTION
rsrc1 and rsrc2. All bytes are considered unsigned. The
median computation on packed pixel data structures:
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 0x0201000e, r40 = 0xff00ff02
r10 = 0, r60 = 0x9c9c6464, r70 = 0x649d649c
r20 = 1, r60 = 0x9c9c6464, r70 = 0x649d649c
The
MEDIAN_Q(a,b,c) (QUADUMIN( QUADUMAX( QUADUMIN((a),(b)), (c)), QUADUMAX((a),(b))))
The
[ IF rguard ] quadumax rsrc1 rsrc2 → rdest
if rguard then {
}
rdest<7:0> ← if rsrc1<7:0> > rsrc2<7:0> then rsrc1<7:0> else rsrc2<7:0>
rdest<15:8> ← if rsrc1<15:8> > rsrc2<15:8> then rsrc1<15:8> else rsrc2<15:8>
rdest<23:16> ← if rsrc1<23:16> > rsrc2<23:16> then rsrc1<23:16> else rsrc2<23:16>
rdest<31:24> ← if rsrc1<31:24> > rsrc2<31:24> then rsrc1<31:24> else rsrc2<31:24>
quadumax
quadumax
Initial Values
operation computes four separate maximum values of the four pairs of corresponding 8-bit bytes of
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
quadumax r30 r40 → r50
IF r10 quadumax r60 r70 → r80
IF r20 quadumax r60 r70 → r90
quadumax
Operation
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
operation is particularly suited to implement
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
imax imin quadumin
r50 ← 0xff01ff0e
no change, since guard is false
r90 ← 0x9c9d649c
ATTRIBUTES
SEE ALSO
quadumax
Result
dspalu
1,3
No
81
—
2
2
A-150