PNX1301EH NXP Semiconductors, PNX1301EH Datasheet - Page 465

• Manufacturer Part Number: PNX1301EH
• Manufacturer: NXP Semiconductors

Specifications of PNX1301EH

• Lead Free Status / RoHS Status: Not Compliant

PNX1300/01/02/11 Data Book
st8d
SYNTAX
FUNCTION
DESCRIPTION
arguments. (Note: pseudo operations cannot be used in assembly files.)
address formed from the sum rsrc1 + d. The value of the opcode modifier d must be in the range -64 and 63 inclusive.
This operation does not depend on the bytesex bit in the PCSW since only a single byte is stored.
defined only for 32-bit loads and stores.
modification of the addressed memory location (and the modification of cache if the location is cacheable). If the LSB
of rguard is 1, the store takes effect. If the LSB of rguard is 0, st8d has no side effects whatever; in particular, the LRU
and other status bits in the data cache are not affected.
EXAMPLES
A-167
r10 = 0xd00, r80 = 0x44332211
r50 = 0, r20 = 0xd01,
r70 = 0xaabbccdd
r60 = 1, r30 = 0xd02,
r70 = 0xaabbccdd
The
The
The result of an access by
The
[ IF rguard ] st8d(d) rsrc1 rsrc2
if rguard then
st8d
mem[rsrc1 + d] ← rsrc2<7:0>
st8d
st8d
Initial Values
operation stores the least-significant 8-bit byte of rsrc2 into the memory location pointed to by the
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation is a pseudo operation transformed by the scheduler into an
PRELIMINARY SPECIFICATION
st8d
st8d(3) r10 r80
IF r50 st8d(-4) r20 r70
IF r60 st8d(-4) r30 r70
to the MMIO address aperture is undefined; access to the MMIO aperture is
Operation
8-bit store with displacement
[0xd03] ← 0x11
no change, since guard is false
[0xcfe] ← 0xdd
h_st8d st8 st16 st16d st32
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Philips Semiconductors
pseudo-op for h_st8d
h_st8d
ATTRIBUTES
SEE ALSO
Result
st32d
with the same
–64..63
dmem
7 bits
4, 5
n/a
29
2