PNX1311EH NXP Semiconductors, PNX1311EH Datasheet - Page 194

PNX1311EH

Manufacturer Part Number
PNX1311EH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1311EH

Lead Free Status / RoHS Status
Not Compliant

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PNX1300/01/02/11 Data Book
64-Mbit SDRAMs organized in x8 devices could be used
to build a 32-MB memory system as illustrated in
Figure
12-12
Figure 12-8. Schematic of a 32-MB memory system consisting of four 4×2M×8 SDRAM chips (one rank)
12-8. Note that due to the unusual way of using
PRELIMINARY SPECIFICATION
MM_CLK[1]
MM_CLK[1]
MM_CLK[0]
MM_CLK[0]
CLK
Control
CLK
Control
CLK
Control
CLK
Control
Address[11:0]
Address[11:0]
Address[11:0]
Address[11:0]
BA[1:0]
BA[1:0]
BA[1:0]
BA[1:0]
PNX1300
SDRAM
4×2M×8
4×2M×8
SDRAM
4×2M×8
SDRAM
4×2M×8
SDRAM
the devices, it is the only supported configuration with x8
devices. MM_CONFIG.SIZE must be set to 6 (i.e. 16-MB
rank size,
DQ[7:0]
DQ[7:0]
DQ[7:0]
DQ[7:0]
DQM]
DQM]
DQM]
DQM
CS#
CS#
CS#
CS#
Section
GND
GND
GND
GND
MM_DQ[23:16]
MM_DQ[31:24]
MM_DQ[15:8]
MM_DQM[3]
MM_DQM[2]
MM_DQM[1]
MM_DQ[7:0]
MM_DQM[0]
12.6.1).
Philips Semiconductors

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