PEF2054NV21XK Infineon Technologies, PEF2054NV21XK Datasheet - Page 208

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PEF2054NV21XK

Manufacturer Part Number
PEF2054NV21XK
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF2054NV21XK

Lead Free Status / Rohs Status
Compliant
5.6
If a CFI time slot shall be accessed by the P instead of being switched to the PCM
interface, this channel can be configured as a P channel. This is achieved by writing
the code ‘1001’ to the CM code field. In this case the content of the corresponding CFI
time slot is directly exchanged with the CM data field. Figure 73 and figure 74 illustrate
the use of the Control Memory (CM) data and code fields for such applications.
If a CFI time slot is initialized as P channel, the function taken on by the CM data field
can be compared to the function taken on by the Data Memory (DM) data field at the
PCM interface, i.e. it buffers the PCM data received or to be transmitted at the serial
interface. In contrast to the PCM interface, where PCM idle channels can be
programmed on a 2 bit subtime slot basis, the CFI only allows P access for full 8 bit
time slots.
Figure 73
Semiconductor Group
P Access to the Downstream CFI Frame
MACR:
Down-
stream
P Channels
0 1 0 0 1 0 0 0
CFI
Frame
0
127
1
Code Field
0
0
1
Control Memory
MADR:
208
Data Field
MAAR:
0
MA6
Application Hints
.
.
.
PEB 2055
PEF 2055
.
ITD08089
. MA0

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