MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 27

• Manufacturer Part Number: MT48LC16M16LFFG
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M16LFFG

• Lead Free Status / Rohs Status: Not Compliant

BURST READ/SINGLE WRITE
gramming the write burst mode bit (M9) in the mode
register to a logic 1. In this mode, all WRITE commands
result in the access of a single column location (burst of
one), regardless of the programmed burst length. READ
commands access columns according to the pro-
grammed burst length and sequence, just as in the
normal mode of operation (M9 = 0).
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
The burst read/single write mode is entered by pro-
27
COMMAND
INTERNAL
ADDRESS
CLOCK
NOTE: For this example, CAS latency = 2, burst length = 4 or greater, and
Clock Suspend During READ Burst
CKE
CLK
DQ
DQM is LOW.
T0
BANK,
COL n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
READ
T1
NOP
Figure 23
T2
NOP
D
OUT
n
MOBILE SDRAM
T3
TRANSITIONING DATA
©2003 Micron Technology, Inc. All rights reserved.
256Mb: x16
D
n + 1
OUT
T4
NOP
PRELIMINARY
T5
NOP
n + 2
D
OUT
DON’T CARE
T6
NOP
D
n + 3
OUT