MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 53

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
NOTE: 1. For this example, the burst length = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
TIMING PARAMETERS
*CAS latency indicated in parentheses.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
A0-A9, A11, A12
DQML, DQMU
SYMBOL*
t
t
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
COMMAND
BA0, BA1
DQM/
2. x16: A9, A11 and A12 = “Don’t Care”
3. 14ns to 15ns is required between <D
CKE
A10
CLK
DQ
t CKS
t CMS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
MAX
T1
2.5
2.5
NOP
10
20
1
3
3
8
1
-8
DISABLE AUTO PRECHARGE
MIN
t CMS
t CL
t DS
COLUMN m 2
WRITE – WITHOUT AUTO PRECHARGE
WRITE
T2
BANK
D
IN
t CMH
MAX
t CH
t DH
m
2.5
2.5
10
12
25
1
3
3
1
-10
IN
t DS
UNITS
m> and the PRECHARGE command, regardless of frequency.
D
IN
T3
NOP
m + 1
t DH
ns
ns
ns
ns
ns
ns
ns
ns
ns
t DS
D
IN
T4
NOP
m + 2
53
t DH
SYMBOL*
t
t
t
t
t
t
t
t
t
t DS
CMH
CMS
DH
DS
RAS
RC
RCD
RP
WR
D
IN
NOP
T5
m + 3
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
WR
T6
NOP
3
1
PRECHARGE
SINGLE BANK
ALL BANKs
MIN
T7
BANK
2.5
2.5
48
80
20
20
15
1
1
MOBILE SDRAM
-8
120,000
©2003 Micron Technology, Inc. All rights reserved.
MAX
256Mb: x16
t RP
NOP
T8
PRELIMINARY
DON’T CARE
MIN
100
2.5
2.5
50
20
20
15
1
1
-10
120,000
MAX
ACTIVE
ROW
ROW
BANK
T9
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns

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