MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 59

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MT48LC16M16LFFG

Manufacturer Part Number
MT48LC16M16LFFG
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M16LFFG

Lead Free Status / Rohs Status
Not Compliant
TIMING PARAMETERS
*CAS latency indicated in parentheses.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
A0-A9, A11, A12
NOTE: 1. For this example, the burst length = 4.
DQML, DQMU
SYMBOL*
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
COMMAND
BA0, BA1
2. x16: A9, A11 and A12 = “Don’t Care”
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
MIN
2.5
10
20
1
3
3
8
t RCD
t CK
-8
T1
MAX
NOP
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
MIN
2.5
10
12
25
1
3
3
t CMS
t CL
WRITE – DQM OPERATION
COLUMN m 2
t DS
-10
WRITE
T2
BANK
D
MAX
IN
t CMH
t DH
m
t CH
UNITS
ns
ns
ns
ns
ns
ns
ns
T3
NOP
59
SYMBOL*
t
t
t
t
t
t
t
CKH
CKS
CMH
CMS
DH
DS
RCD
t DS
D
T4
IN
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
t DS
D
T5
IN
NOP
m + 3
t DH
MIN
2.5
2.5
2.5
20
1
1
1
MOBILE SDRAM
-8
©2003 Micron Technology, Inc. All rights reserved.
MAX
NOP
T6
256Mb: x16
PRELIMINARY
MIN
2.5
2.5
2.5
20
1
1
1
-10
MAX
NOP
DON’T CARE
T7
UNITS
ns
ns
ns
ns
ns
ns
ns

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