MT48LC16M16LFFG Micron Technology Inc, MT48LC16M16LFFG Datasheet - Page 48

• Manufacturer Part Number: MT48LC16M16LFFG
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M16LFFG

• Lead Free Status / Rohs Status: Not Compliant

NOTE: 1. For this example, the burst length = 1, the CAS latency = 2, and the READ burst is followed by a “manual”
*CAS latency indicated in parentheses.
256Mb: x16 Mobile SDRAM
MobileRamY26L_B.p65 – Pub. 04/03
TIMING PARAMETERS
SYMBOL*
t
t
t
t
t
t
t
t
t
t
t
t
AC (3)
AC (2)
AC (1)
AH
AS
CH
CL
CK (3)
CK (2)
CK (1)
CKH
CKS
A0-A9, A11,A12
DQML, DQMU
COMMAND
2. PRECHARGE command not allowed else
3. x16: A9, A11 and A12 = “Don’t Care”
BA0, BA1
DQM /
PRECHARGE.
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
ROW
ROW
BANK
T0
t CMH
t CKH
t AH
t AH
t AH
t RCD
t RAS
t RC
MIN
2.5
2.5
10
20
t CK
1
3
3
8
1
SINGLE READ – WITHOUT AUTO PRECHARGE
T1
-8
NOP
MAX
DISABLE AUTO PRECHARGE
19
7
8
t CMS
t CL
COLUMN m
MIN
2.5
2.5
10
12
25
BANK
T2
READ
1
3
3
1
t CMH
t CH
-10
CAS Latency
3
MAX
t
22
RAS would be violated.
7
8
T3
NOP
UNITS
t LZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
t AC
48
T4
D
NOP
OUT
t OH
t HZ
2
m
SYMBOL*
t
t
t
t
t
t
t
t
t
t
t
CMH
CMS
HZ (3)
HZ (2)
HZ (1)
LZ
OH
RAS
RC
RCD
RP
SINGLE BANKS
PRECHARGE
ALL BANKS
BANK(S)
T5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RP
T6
NOP
MIN
2.5
2.5
48
80
20
20
1
1
1
MOBILE SDRAM
ACTIVE
-8
ROW
BANK
T7
ROW
120,000
©2003 Micron Technology, Inc. All rights reserved.
MAX
19
7
8
256Mb: x16
PRELIMINARY
MIN
100
2.5
2.5
50
20
20
1
1
T8
NOP
-10
120,000
DON’T CARE
UNDEFINED
MAX
22
7
8
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns