XC4VFX20-10FFG672C Xilinx Inc, XC4VFX20-10FFG672C Datasheet - Page 235
XC4VFX20-10FFG672C
Manufacturer Part Number
XC4VFX20-10FFG672C
Description
IC FPGA VIRTEX-4 FX 20K 672-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Datasheets
1.XC4VFX12-10FFG668C.pdf
(58 pages)
2.XC4VFX12-10FFG668C.pdf
(9 pages)
3.XC4VFX12-10FFG668C.pdf
(406 pages)
Specifications of XC4VFX20-10FFG672C
Total Ram Bits
1253376
Number Of Logic Elements/cells
19224
Number Of Labs/clbs
2136
Number Of I /o
320
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-BBGA, FCBGA
No. Of Logic Blocks
19224
No. Of Macrocells
19224
No. Of Speed Grades
10
No. Of I/o's
320
Clock Management
DCM
I/o Supply Voltage
3.45V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V4-ML405-UNI-G - EVALUATION PLATFORM VIRTEX-4
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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- XC4VFX12-10FFG668C PDF datasheet
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- Download datasheet (6Mb)
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA I/O Bank Rules
R
3.3V I/O Support
Reference Voltage (V
Output Drive Source Voltage (V
The number of banks available in Virtex-4 devices is not limited to eight as in previous
Xilinx® architectures. In Virtex-4 devices, with some exceptions in the center column, an
I/O bank consists of 64 IOBs (32 CLBs and two clock regions). As a result, the number of
banks depends upon the device size. In the
I/O banks is listed by device type. The XC4VLX25 has 10 usable I/O banks and one
configuration bank.
XC4VLX25 I/O banks.
The Virtex-4 architecture supports 3.3V single-ended I/O standards in all banks.
Low-voltage, single-ended I/O standards with a differential amplifier input buffer require
an input reference voltage (V
each I/O bank, one of every 16 I/O pins is automatically configured as a V
using a single-ended I/O standard requiring a differential amplifier input buffer.
Many of the low-voltage I/O standards supported by Virtex-4 devices require a different
output drive voltage (V
source voltages.
Output buffers within a given V
voltage. The following input buffers use the V
and other DCI standards.
Figure 6-3
REF
CCO
BANK
64 I/O
BANK
64 I/O
BANK
64 I/O
) Pins
www.xilinx.com
Figure 6-3: XC4VLX25 I/O Banks
). As a result, each device often supports multiple output drive
REF
is an example of a columnar floorplan showing the
CCO
). V
CCO
SelectIO Technology Resources General Guidelines
REF
bank must share the same output drive source
) Pins
is an external input into Virtex-4 devices. Within
BANK
BANK
BANK
BANK
Virtex-4 Family Overview
CCO
voltage: LVTTL, LVCMOS, PCI, LVDCI
ug070_6_03_071404
BANK
64 I/O
BANK
64 I/O
BANK
64 I/O
the total number of
REF
input, if
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