IDTSTAC9753XXTAEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9753XXTAEB2XR Datasheet - Page 40

• Manufacturer Part Number: IDTSTAC9753XXTAEB2XR
• Description: IC CODEC AC'97 MIC/JACK 48-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753XXTAEB2XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753XXTAEB2XR

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
5.5.
5.5.1.
AC-Link Interoperability Requirements and Recommendations
“Atomic slot” Treatment of Slot 1 Address and Slot 2 Data
Command or Status Address and Data cannot be split across multiple AC-Link frames. The following
transactions require that valid Slot 1 Address and valid Slot 2 Data be treated as “atomic” (insepara-
ble) with Slot 0 Tag bits for Address and Data set accordingly (that is, both valid):
1. AC‘97 Digital Controller write commands to Primary CODECs
2. AC‘97 CODEC status responses
Whenever the AC‘97 Digital Controller addresses a Primary CODEC or an AC‘97 CODEC responds
to a read command, Slot 0 Tag bits should always be set to indicate actual Slot 1 and Slot 2 data
validity.
When the AC‘97 Digital Controller addresses a Secondary CODEC, the Slot 0 Tag bits for Address
and Data must be 0. A non-zero, 2-bit CODEC ID in the LSBs of Slot 0 indicates a valid Read or
Write Address in Slot 1, and the Slot 1 R/W bit indicates presence or absence of valid Data in Slot 2.
AC‘97 Digital Controller Primary
Read Frame N, SDATA_OUT
AC‘97 Digital Controller Primary
Write Frame N, SDATA_OUT
AC‘97 CODEC Status Frame
N+1, SDATA_IN
AC‘97 Digital Controller
Secondary Read Frame N,
SDATA_OUT
AC‘97 Digital Controller
Secondary Write Frame N,
SDATA_OUT
AC‘97 CODEC Status Frame N+1,
SDATA_IN
Function
Function
Table 12. Secondary CODEC Addressing: Slot 0 Tag Bits
Table 11. Primary CODEC Addressing: Slot 0 Tag Bits
Slot 0, bit 15
Slot 0, bit 15
Frame)
(Valid
Frame)
1
1
1
(Valid
40
1
1
1
Slot 0, bit 14
(Valid Slot 1
Address)
Slot 0, bit 14
(Valid Slot 1
Address)
1
1
1
0
0
1
STAC9752/9753
(Valid Slot 2 Data)
Slot 0, bit 13
Slot 0, bit 13
(Valid Slot 2
Data)
0
1
1
0
0
1
Slot 0, Bits 1-0
(CODEC ID)
(CODEC ID)
01, 10, or 11
01, 10, or 11
Slot 0, Bits
REV 3.3 1206
00
00
00
1-0
00