IDTSTAC9753XXTAEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9753XXTAEB2XR Datasheet - Page 59

• Manufacturer Part Number: IDTSTAC9753XXTAEB2XR
• Description: IC CODEC AC'97 MIC/JACK 48-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753XXTAEB2XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753XXTAEB2XR

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
8.1.19.
Bit(s)
7:4
8
3
2
1
0
D15
ID1
D7
8.1.18.1.
The lower half of this register is read only status, a 1 indicating that each subsection is “ready”.
Ready is defined as the subsection's ability to perform in its nominal state. When this register is writ-
ten, the bit values that come in on AC-Link will have no effect on read-only bits 0-7.
When the AC-Link “CODEC Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1, it indicates that the
AC-Link and AC'97 control and status registers are in a fully operational state. The AC'97 controller
must further probe this Powerdown Control/Status Register to determine exactly which subsections,
if any, are ready. When this register is written, the bit values that come in on AC-Link will have no
effect on read-only bits 0-7.
8.1.18.2.
The STAC9752/9753 is capable of operating at reduced power when no activity is required. The
state of power down is controlled by the Powerdown Register (26h). See the section “Low Power
Modes” for more information.
8.1.18.3.
The EAPD bit 15 of the Powerdown Control/Status Register (Index 26h) directly controls the output
of the EAPD output, pin 45, and produces a logical 1 when this bit is set to logic high. This function is
used to control an external audio amplifier power down. EAPD = 0 places approximately 0V on the
output pin, enabling an external audio amplifier. EAPD = 1 places approximately DVdd on the output
pin, disabling the external audio amplifier. Audio amplifiers that operate with reverse polarity will
likely require an external inverter to maintain software driver compatibility.
EAPD can also act as a GPIO. See Section 8.4.11: page77. The GPIO controls in Section 8.2:
page64 have no effect on EAPD.
Extended Audio ID (28h)
Default: 0A05h
RESERVED
Reset Value
0
0
1
1
1
1
D14
ID0
Ready Status
Powerdown Controls
External Amplifier Power Down Control Output
D6
RESERVED
Name
DAC
ADC
PR0
REF
ANL
DSA1
D13
D5
0 = ADC powered up
1 = ADC powered down
Bit not used, should read back 0
Read Only --- VREF status
1 = VREFs enabled
Read Only ---- ANALOG MIXERS, etc. Status
1 = Analog Mixers ready.
Read Only ---- DAC Status
1 = DAC ready to playback
Read Only ---- ADC Status
1 = ADC ready to record
DSA0
D12
59
D4
RESERVED
RSVD
D11
D3
Description
STAC9752/9753
SPDIF
D10
D2
AMAP
RSVD
D9
D1
REV 3.3 1206
RSVD
VRA
D8
D0