PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 101
PIC16F1947-I/PT
Manufacturer Part Number
PIC16F1947-I/PT
Description
64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16LF1946-IPT.pdf
(448 pages)
Specifications of PIC16F1947-I/PT
A/d Inputs
17-Channel, 10-Bit
Comparators
3
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
54
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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7.5.9
The PIR4 register contains the interrupt flag bits, as
shown in
REGISTER 7-9:
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-6
bit 5
bit 4
bit 3-2
bit 1
bit 0
U-0
—
Register
PIR4 REGISTER
Unimplemented: Read as ‘0’
RC2IF: USART2 Receive Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TX2IF: USART2 Transmit Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
BCL2IF: MSSP2 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
SSP2IF: Synchronous Serial Port (MSSP2) Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
7-9.
U-0
—
PIR4: PERIPHERAL INTERRUPT REQUEST REGISTER 4
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
RC2IF
R/W-0/0
TX2IF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
—
Note:
PIC16F/LF1946/47
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
U-0
—
software
R/W-0/0
BCL2IF
should
DS41414B-page 101
ensure
R/W-0/0
SSP2IF
bit 0
the
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