PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 47

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PIC16F1947-I/PT

Manufacturer Part Number
PIC16F1947-I/PT
Description
64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1947-I/PT

A/d Inputs
17-Channel, 10-Bit
Comparators
3
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
54
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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TABLE 3-9:
 2010 Microchip Technology Inc.
F80h
F81h
F82h
F83h
F84h
F85h
F86h
F87h
F88h
F89h
F8Ah
)
F8Bh
F8Ch
FE3h
FE4h
FE5h
FE6h
FE7h
FE8h
FE9h
FEAh
FEBh
FECh
FEDh
FEEh
FEFh
Legend:
Note 1:
Address
Bank 31
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1),(2
(2)
2:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
STKPTR
TOSL
TOSH
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are transferred
to the upper byte of the program counter.
These registers can be addressed from any bank.
STATUS_
PCLATH_
FSR0H_
FSR1H_
WREG_
FSR0L_
FSR1L_
Name
SHAD
SHAD
SHAD
SHAD
SHAD
SHAD
SHAD
SHAD
BSR_
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Working Register Normal (Non-ICD) Shadow
Indirect Data Memory Address 0 Low Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 0 High Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 1 Low Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 1 High Pointer Normal (Non-ICD) Shadow
Unimplemented
Top of Stack Low byte
Bit 7
GIE
Write Buffer for the upper 7 bits of the Program Counter
Program Counter Latch High Register Normal (Non-ICD) Shadow
Top of Stack High byte
PEIE
Bit 6
TMR0IE
Bit 5
Preliminary
Bank Select Register Normal (Non-ICD) Shadow
Current Stack pointer
Bit 4
INTE
TO
IOCIE
Bit 3
PD
PIC16F/LF1946/47
BSR<4:0>
TMR0IF
Bit 2
Z
Z
INTF
Bit 1
DC
DC
IOCIF
Bit 0
C
C
DS41414B-page 47
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
---- -xxx ---- -uuu
xxxx xxxx uuuu uuuu
---x xxxx ---u uuuu
-xxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
-xxx xxxx -uuu uuuu
POR, BOR
Value on:
Value on all
Resets
other

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