PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 141

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PIC16F1947-I/PT

Manufacturer Part Number
PIC16F1947-I/PT
Description
64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1947-I/PT

A/d Inputs
17-Channel, 10-Bit
Comparators
3
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
54
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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REGISTER 12-18: LATE: PORTE DATA LATCH REGISTER
REGISTER 12-19: ANSELE: PORTE ANALOG SELECT REGISTER
TABLE 12-6:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
APFCON
ANSELE
CCPxCON
LATE
LCDCON
LCDREF
LCDSE2
PORTE
TRISE
Legend:
Note 1:
R/W-x/u
Name
LATE7
R/W-1
Writes to PORTE are actually written to corresponding LATE register. Reads from PORTE register is return of
actual I/O pin values.
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow
external control of the voltage on the pin.
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTE.
Applies to ECCP modules only.
ANSE<7:0> : Analog Select between Analog or Digital Function on Pins RE<7:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
P3CSEL
LCDIRE
LATE<7:0> : PORTE Output Latch Value bits
TRISE7
LCDEN
LATE7
SE31
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
RE7
R/W-x/u
R/W-1
LATE6
PxM<1:0>
P3BSEL
LCDIRS
TRISE6
SLPEN
LATE6
SE30
Bit 6
(1)
RE6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-x/u
R/W-1
LATE5
P2DSEL
TRISE5
LCDIRI
LATE5
WERR
SE29
Bit 5
RE5
DCxB<1:0>
R/W-x/u
LATE4
R/W-1
P2CSEL
TRISE4
Preliminary
LATE4
SE28
Bit 4
RE4
(1)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
VLCD3PE
P2BSEL
TRISE3
R/W-x/u
LATE3
LATE3
SE27
Bit 3
R/W-1
(1)
RE3
. Digital input buffer disabled.
CS<1:0>
PIC16F/LF1946/47
CCP2SEL
VLCD2PE
TRISE2
ANSE2
LATE2
SE26
Bit 2
RE2
CCPxM<3:0>
R/W-x/u
ANSE2
LATE2
R/W-1
VLCD1PE
P1CSEL
TRISE1
ANSE1
LATE1
SE25
Bit 1
RE1
LMUX<1:0>
R/W-x/u
ANSE1
R/W-1
LATE1
P1BSEL
TRISE0
ANSE0
LATE0
SE24
Bit 0
RE0
DS41414B-page 141
ANSE0
R/W-x/u
R/W-1
LATE0
Register
on Page
126
141
236
141
337
339
341
140
140
bit 0
bit 0

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