PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 309

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PIC16F1947-I/PT

Manufacturer Part Number
PIC16F1947-I/PT
Description
64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1947-I/PT

A/d Inputs
17-Channel, 10-Bit
Comparators
3
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
54
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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25.3
The Baud Rate Generator (BRG) is an 8-bit or 16-bit
timer that is dedicated to the support of both the
asynchronous and synchronous EUSART operation.
By default, the BRG operates in 8-bit mode. Setting the
BRG16 bit of the BAUDxCON register selects 16-bit
mode.
The SPxBRGH:SPxBRGL register pair determines the
period of the free running baud rate timer. In
Asynchronous mode the multiplier of the baud rate
period is determined by both the BRGH bit of the
TXxSTA register and the BRG16 bit of the BAUDxCON
register. In Synchronous mode, the BRGH bit is ignored.
Example 25-1
mining the desired baud rate, actual baud rate, and
baud rate% error.
Typical baud rates and error values for various
asynchronous modes have been computed for your
convenience and are shown in
advantageous to use the high baud rate (BRGH = 1),
or the 16-bit BRG (BRG16 = 1) to reduce the baud rate
error. The 16-bit BRG mode is used to achieve slow
baud rates for fast oscillator frequencies.
Writing a new value to the SPxBRGH, SPxBRGL
register pair causes the BRG timer to be reset (or
cleared). This ensures that the BRG does not wait for a
timer overflow before outputting the new baud rate.
TABLE 25-3:
 2010 Microchip Technology Inc.
Legend:
SYNC
0
0
0
0
1
1
EUSART Baud Rate Generator
(BRG)
x = Don’t care, n = value of SPxBRGH, SPxBRGL register pair
Configuration Bits
provides a sample calculation for deter-
BAUD RATE FORMULAS
BRG16
0
0
1
1
0
1
Table
BRGH
0
1
0
1
x
x
25-5. It may be
Preliminary
BRG/EUSART Mode
16-bit/Asynchronous
16-bit/Asynchronous
16-bit/Synchronous
8-bit/Asynchronous
8-bit/Asynchronous
8-bit/Synchronous
If the system clock is changed during an active receive
operation, a receive error or data loss may result. To
avoid this problem, check the status of the RCIDL bit to
make sure that the receive operation is Idle before
changing the system clock.
EXAMPLE 25-1:
Baud Rate % Error =
For a device with F
of 9600, Asynchronous mode, 8-bit BRG:
Solving for SPxBRGH:SPxBRGL:
ActualBaudRate
Desired Baud Rate
PIC16F/LF1946/47
SPxBRGH: SPxBRGL
Calc. Baud Rate Desired Baud Rate
------------------------------------------------------------------------------------------- -
=
OSC
=
=
=
=
=
-------------------------- -
64 25
16000000
CALCULATING BAUD
RATE ERROR
------------------------------------------------------------------------- -
64 [SPxBRGH:SPxBRG]
9615
----------------------------------
16000000
----------------------- -
----------------------- - 1
25.042
9615 9600
of 16 MHz, desired baud rate
9600
Desired Baud Rate
64
Baud Rate Formula
9600
+
F
F
=
1
F
OSC
OSC
OSC
--------------------------------------------- 1
=
-------------------------------------------- -
Desired Baud Rate
F
25
/[64 (n+1)]
/[16 (n+1)]
OS C
/[4 (n+1)]
DS41414B-page 309
=
F
OS C
64
0.16%
+
1

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