PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 276

• Manufacturer Part Number: PIC16F1947-I/PT
• Description: 64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1947-I/PT

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 54
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F/LF1946/47
24.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSPxCON2 register. If the
SDAx and SCLx pins are sampled high, the Baud Rate
Generator
SSPxADD<7:0> and starts its count. If SCLx and
SDAx are both sampled high when the Baud Rate
Generator times out (T
low. The action of the SDAx being driven low while
SCLx is high is the Start condition and causes the S bit
of the SSPxSTAT1 register to be set. Following this,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and resumes its count. When the
Baud Rate Generator times out (T
the SSPxCON2 register will be automatically cleared
FIGURE 24-26:
DS41414B-page 276
I
CONDITION TIMING
2
C MASTER MODE START
is
reloaded
FIRST START BIT TIMING
Write to SEN bit occurs here
BRG
), the SDAx pin is driven
with
SDAx
SCLx
BRG
the
), the SEN bit of
contents
SDAx = 1,
SCLx = 1
T
BRG
Preliminary
of
S
Set S bit (SSPxSTAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
by hardware; the Baud Rate Generator is suspended,
leaving the SDAx line held low and the Start condition
is complete.
and sets SSPxIF bit
Note 1: If at the beginning of the Start condition,
Write to SSPxBUF occurs here
T
BRG
2: The Philips I
1st bit
the SDAx and SCLx pins are already sam-
pled low, or if during the Start condition,
the SCLx line is sampled low before the
SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
its Idle state.
bus collision cannot occur on a Start.
T
BRG
 2010 Microchip Technology Inc.
2
C Specification states that a
2nd bit
2
C module is reset into