PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 217

• Manufacturer Part Number: PIC16F1947-I/PT
• Description: 64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1947-I/PT

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 54
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

23.2.5
The Compare mode is dependent upon the system
clock (F
down during Sleep mode, the Compare mode will not
function properly during Sleep.
TABLE 23-4:
 2010 Microchip Technology Inc.
CCPxCON
CCPRxL
CCPRxH
INTCON
PIE1
PIE2
PIE3
PIR1
PIR2
PIR3
T1CON
T1GCON
TMR1L
TMR1H
TRISA
TRISB
TRISC
TRISD
TRISE
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Compare mode.
Note 1:
Name
OSC
*
Applies to ECCP modules only.
Page provides register information.
COMPARE DURING SLEEP
) for proper operation. Since F
Capture/Compare/PWM Register x Low Byte (LSB)
Capture/Compare/PWM Register x High Byte (MSB)
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1GIE
TMR1GIF
TMR1GE
TRISA7
TRISB7
TRISC7
TRISD7
TRISE7
OSFIE
OSFIF
Bit 7
GIE
TMR1CS<1:0>
—
—
PxM<1:0>
SUMMARY OF REGISTERS ASSOCIATED WITH COMPARE
T1GPOL
CCP5IE
CCP5IF
TRISA6
TRISB6
TRISC6
TRISD6
TRISE6
PEIE
ADIE
C2IE
ADIF
Bit 6
C2IF
(1)
TMR0IE
CCP4IE
CCP4IF
TRISC5
TRISD5
T1GTM
TRISA5
TRISB5
TRISE5
RCIE
RCIF
C1IE
Bit 5
C1IF
T1CKPS<1:0>
DCxB<1:0>
OSC
T1GSPM
is shut
CCP3IE
CCP3IF
TRISA4
TRISB4
TRISC4
TRISD4
TRISE4
INTE
EEIE
Bit 4
TXIE
TXIF
EEIF
Preliminary
T1GGO/DONE
T1OSCEN
TMR6IE
TMR6IF
TRISA3
TRISB3
TRISC3
TRISD3
TRISE3
SSPIE
BCLIE
SSPIF
IOCIE
BCLIF
Bit 3
23.2.6
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register, APFCON. To determine which pins can be
moved and what their default locations are upon a
reset, see
more information.
PIC16F/LF1946/47
T1SYNC
Section 12.1 “Alternate Pin Function”
T1GVAL
TMR0IF
CCP1IE
CCP1IF
TRISC2
TRISD2
TRISA2
TRISB2
TRISE2
LCDIE
LCDIF
ALTERNATE PIN LOCATIONS
Bit 2
CCPxM<3:0>
—
—
TMR2IE
TMR4IE
TMR2IF
TMR4IF
TRISC1
TRISD1
TRISA1
TRISB1
TRISE1
C31F
INTF
C3IE
Bit 1
—
T1GSS<1:0>
TMR1ON
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISA0
TRISB0
TRISC0
TRISD0
TRISE0
IOCIF
Bit 0
DS41414B-page 217
—
—
Register
on Page
214*
214*
201*
201*
236
100
205
206
128
131
134
137
140
93
94
95
96
98
99
for