IDT82P2288BB IDT, Integrated Device Technology Inc, IDT82P2288BB Datasheet - Page 91

• Manufacturer Part Number: IDT82P2288BB
• Description: TXRX T1/J1/E1 8CHAN 256-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2288BB

• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2288BB

the XDL0, XDL1 & XDL2 registers will replace the Concentrator (C) bits,
the Maintenance (M) bits, the Alarm (A) bits and the Switch (S) bits
respectively (refer to Table 15).
pattern can be inserted into the bit right after each F-bit. The content of
the mimic pattern is the same as the F-bit. The mimic pattern insertion is
for diagnostic purpose.
to be transmitted when the XYEL bit is set, or the Yellow alarm signal will
be inserted automatically by setting the AUTOYELLOW bit when Red
alarm is declared in the received data stream. The Yellow alarm signal is
logic 0 on the 2nd bit of each channel.
Interrupt Summary
condition, if the BFE bit is enabled, an interrupt will be reported by the
INT pin.
will be set. In this condition, if the MFE bit is enabled, an interrupt will be
reported by the INT pin.
Functional Description
IDT82P2288
When the FDIS bit and the FDLBYP bit are both ‘0’s, the contents in
When the FDIS bit is ‘0’, configured by the MIMICEN bit, the mimic
The Yellow alarm signal will be manually inserted in the data stream
At the first bit of each basic frame, the BFI bit will be set. In this
At the first bit of each SF/ESF/T1 DM/SLC-96 multiframe, the MFI bit
91
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Table 46: Related Bit / Register In Chapter 3.20.1.1
AUTOYELLOW
MIMICEN
CRCBYP
FDLBYP
CRCINV
DDSINV
C[11:1]
FsINV
M[3:1]
A[2:1]
S[4:1]
FtINV
XYEL
FDIS
MFE
BFE
MFI
BFI
Bit
FGEN Interrupt Indication
FGEN Interrupt Control
FGEN Maintenance 1
FGEN Maintenance 0
Error Insertion
XDL1 & XDL0
T1/J1 Mode
Register
XDL1
XDL2
06F, 16F, 26F, 36F, 46F, 56F,
265, 365, 465, 565, 665, 765
06C, 16C, 26C, 36C, 46C,
06D, 16D, 26D, 36D, 46D,
566, 666, 766 & 065, 165,
06B, 16B, 26B, 36B, 46B,
06E, 16E, 26E, 36E, 46E,
062, 162, 262, 362, 462,
066, 166, 266, 366, 466,
066, 166, 266, 366, 466,
067, 167, 267, 367, 467,
T1/J1 Address (Hex)
56C, 66C, 76C
56D, 66D, 76D
56B, 66B, 76B
56E, 66E, 76E
562, 662, 762
566, 666, 766
567, 667, 767
66F, 76F
March 04, 2009