PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 106

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PSB2115FV1.2D

Manufacturer Part Number
PSB2115FV1.2D
Description
Manufacturer
Lantiq
Datasheet

Specifications of PSB2115FV1.2D

Lead Free Status / Rohs Status
Supplier Unconfirmed
Semiconductor Group
Figure 43
Figure 44
Generally it is the responsibility of the DMA-controller to perform the correct bus cycles
as long as a request line is active.
Figure 45
16 or 32)
Timing Diagram for DMA-Transfers (slow) Receive (n = k
DMA-Transfers with Pulsed DACK (read or write)
Timing Diagram for DMA-Transfers (slow or fast) Receive (n = 4, 8,
106
Functional Description
PSB 2115
PSF 2115
64)
11.97

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