PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 24

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
Pin No. Symbol Input (I)
59
Miscellaneous
34
35
56
57
58
47
48
SDS
RES
AMODE I
MODE0 I
MODE1
EAW
ACL
SX1
SX2
Output (O)
O
I/O
I
I
O
O
O
Function
Serial Data Strobe
Programmable strobe signal, selecting either one or
two channels (8 or 16 bit strobe length) on the IOM-2
or PCM interface.
Reset
A HIGH on this input forces the IPAC into a reset state.
The minimum pulse length is four DCL-clock periods or
four ms (see table 29).
If the terminal specific functions are enabled, the IPAC
may also supply a reset signal.
Address Mode
Selects between direct and indirect register access.
A HIGH selects indirect address mode and a LOW
selects the direct register access.
Mode 0 Select
A LOW selects TE-mode and a HIGH selects LT-T and
LT-S mode (see MODE1/EAW).
Mode 1 Select / External Awake
The pin function depends on the setting of MODE0.
If MODE0=1: Mode 1 Select
A LOW selects LT-S mode and a HIGH selects LT-T
mode.
If MODE0=0: External Awake
If a falling edge on this input is detected, the IPAC
generates an interrupt and, if enabled, a reset pulse.
Activation LED
This pin can either function as a programmable output
or automatically indicate the activated state of the S
interface by a logic ’0’.
An LED with pre-resistance may directly be connected
to ACL.
S-Bus Transmitter Output
Differential output for the S-transmitter.
positive
negative
24
PSB 2115
PSF 2115
Overview
11.97