PSB2115FV1.2D Lantiq, PSB2115FV1.2D Datasheet - Page 84

• Manufacturer Part Number: PSB2115FV1.2D
• Manufacturer: Lantiq

Specifications of PSB2115FV1.2D

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Semiconductor Group
2.5.2
2.5.2.1
To compensate for the extra delay introduced into the receive and transmit path by the
external circuit, the delay of the transmit data can be reduced by 260 ns (i.e. two
oscillator cycles). Therefore PDS of the CONF register must be programmed to “1“.
This delay compensation might be necessary in order to comply with the "total phase
deviation input to output" requirement of CCITT recommendation I.430 which specifies
a phase deviation in the range of – 7% to + 15% of a bit period.
2.5.2.2
The CCITT specification for both transmitter and receiver impedances in TEs results in
a conflict with respect to external S-protection circuitry requirements:
– To avoid destruction or malfunctioning of the S-device it is desirable to drain off even
– To meet the 96 kHz impedance test specified for transmitters and receivers (for TEs
small overvoltages reliably.
only, CCITT sections 8.5.1.2a and 8.6.1.1) the protection circuit must be dimensioned
such that voltages below 2.4 V are not affected (1.2 V CCITT amplitude multiplied by
transformer ratio 1:2).
This requirement results from the fact that this test is to be performed with no supply
voltage being connected to the TE. Therefore the second reference point for
overvoltages V
greater than the combined forward voltages of the diodes, a current exceeding the
specified one may pass the protection circuit.
S/T Interface Circuitry
S/T Interface Pre-Filter Compensation
External Protection Circuitry
DD
, is tied to GND. Then, if the amplitude of the 96 kHz test signal is
84
Functional Description
PSB 2115
PSF 2115
11.97