T7115AMCD LSI, T7115AMCD Datasheet - Page 2

• Manufacturer Part Number: T7115AMCD
• Manufacturer: LSI

Specifications of T7115AMCD

• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Contents
T7121 HDLC Interface for ISDN (HIFI-64)
Features ................................................................................................................................................................... 1
Description................................................................................................................................................................ 1
Pin Information ......................................................................................................................................................... 4
Functional Description .............................................................................................................................................. 8
Absolute Maximum Ratings.................................................................................................................................... 45
Electrical Characteristics ........................................................................................................................................ 45
Clock Characteristics.............................................................................................................................................. 46
Timing Characteristics ............................................................................................................................................ 46
Handling Precautions ............................................................................................................................................. 59
Outline Diagrams.................................................................................................................................................... 60
Ordering Information............................................................................................................................................... 62
Appendix................................................................................................................................................................. 63
2
Microprocessor Bus Interface ................................................................................................................................ 8
FIFO Memory Buffers ............................................................................................................................................ 9
HDLC Operation .................................................................................................................................................. 19
Transparent Mode................................................................................................................................................ 24
Diagnostic Modes ................................................................................................................................................ 25
Powerdown Mode ................................................................................................................................................ 28
Registers.............................................................................................................................................................. 28
TDM Frame Timing Diagrams.............................................................................................................................. 46
Multiplexed Address and Data ............................................................................................................................. 51
Separate Address and Data................................................................................................................................. 53
Concentration Highway........................................................................................................................................ 55
28-Pin, Plastic DIP ............................................................................................................................................... 60
28-Pin, Plastic SOJ, Surface Mounting................................................................................................................ 61
Transparent Mode................................................................................................................................................ 63
HDLC Mode ......................................................................................................................................................... 63
General Features ................................................................................................................................................. 64
Power and Ground............................................................................................................................................... 66
Addressing .......................................................................................................................................................... 8
Interrupts ............................................................................................................................................................. 8
Resets ................................................................................................................................................................. 9
Transmit FIFO ..................................................................................................................................................... 9
Receive FIFO .................................................................................................................................................... 10
Block Move........................................................................................................................................................ 10
Serial Link Interface .......................................................................................................................................... 10
Enabling the Transmitter and Receiver ............................................................................................................. 10
Time-Slot Feature ............................................................................................................................................. 13
Transmission During Unassigned Time Slots ................................................................................................... 14
Bit Order During Transmission .......................................................................................................................... 14
Bit Masking........................................................................................................................................................ 16
SLD and IOM2 Examples.................................................................................................................................. 19
Zero-Bit Insertion/Deletion (Bit Stuffing/Destuffing) .......................................................................................... 19
Transmitter FIFO ............................................................................................................................................... 21
Sending 1-Byte Frames .................................................................................................................................... 21
Transmitter Underrun ........................................................................................................................................ 21
Using the Transmitter Status and Fill Level ...................................................................................................... 21
Receiver FIFO ................................................................................................................................................... 21
Receiver Overrun .............................................................................................................................................. 23
Operational Note (T7121-EL, T7121-PL, T7121-EL2, and T7121-PL2) ............................................................ 23
Loopbacks ......................................................................................................................................................... 25
3-State Mode..................................................................................................................................................... 28
Other ................................................................................................................................................................. 28
Table of Contents
Lucent Technologies Inc.
Data Sheet
April 1997
Page