TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 113
![IC PCI-VME BRIDGE 456PBGA](/photos/6/93/69324/tsi148-133il_sml.jpg)
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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4.5.5.1
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Figure 29: 32-bit Pattern Writes
Data Patterns and Endianness
When writing 32-bit patterns to PCI/X space, the pattern is not Endian byte swapped. Also,
when writing 332-bit patterns, a transfer count that is not an even multiple of four is rounded
off of the last data pattern written to either VME or PCI/X space. The rounding off occurs on
the pattern according to the address space being written to. For example, a pattern written to
PCI/X space is rounded off starting from the left side (Most Significant Bit) of the pattern,
while a pattern written to VME space is rounded off starting from the right (or Least
Significant Bit) side of the pattern.
DSAD
DDAD
DCTL
...18
...10
...08
...00
...18
...10
...08
...00
Incrementing Pattern to VME Space...
Incrementing Pattern to PCI Space...
DMA Control Registers
F1 11 11 20
Static Pattern to PCI Space...
00 00 00 1B
63
11 20 F1 11
11 20 F1 11
11 20 F1 11
63
11 25 F1 11
11 23 F1 11
11 21 F1 11
63
11 20 F1 11
11 20 F1 11
11 20 F1 11
63
11 25 F1 11
11 23 F1 11
11 21 F1 11
xx xx F1 11
Static Pattern to VME Space...
xx xx F1 11
xx xx xx 11
xx xx xx 11
..
..
.. 02
11 xx xx xx
11 20 F1 11
11 20 F1 11
11 20 F1 11
11 xx xx xx
11 24 F1 11
11 22 F1 11
11 20 F1 11
11 20 F1 11
11 20 F1 11
11 20 F1 11
11 20 xx xx
11 26 F1 11
11 24 F1 11
11 22 F1 11
11 20 xx xx
Start Pattern = 0xF1111120
Destination Address = 0x...02
Transfer Count = 27
0
0
0
0
...18
...10
...08
...00
...18
...10
...08
...00
4. DMA Interface > Direction of Data Movement
113
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