TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 275

IC PCI-VME BRIDGE 456PBGA

TSI148-133IL

Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets

Specifications of TSI148-133IL

Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905

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Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
RMA (Received Master Abort): This bit is set when the master receives a master abort. This
bit is only updated when the EDPST bit is clear.
RTA (Received Target Abort): This bit is set when the master receives a target abort. This
bit is only updated when the EDPST bit is clear.
DTT (Delayed Transaction Time-out): This bit is set when there is a delayed transaction
time-out. This bit is only updated when the EDPST bit is clear.
CBEAx (CBE Attribute): These bits capture the PCI-X bus CBE signals during the attribute
phase whenever a PCI/X bus error occurs. These bits are only updated when the EDPST bit is
clear.
COMMx (Command): These bits capture the PCI/X bus command whenever a PCI/X bus
error occurs. These bits are only updated when the EDPST bit is clear.
10. Registers > Register Map
275

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