TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 57
![IC PCI-VME BRIDGE 456PBGA](/photos/6/93/69324/tsi148-133il_sml.jpg)
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
•
•
•
The following steps are used to perform RMW cycles on the VMEbus (see
1. A PCI/X bus read access address matches the Target Address
2. The VME Master reads the data at the Target Address.
3. The VME Master completes the read on the VMEbus.
4. The data read from the Target Address is compared with the data in the Compare register.
5. When the enable register is set and the compare is true, the enabled bits which compare
6. The data read from the VMEbus is returned to the PCI/X Master.
VMEbus RMW Enable (RMWEN): This register defines the bits that are involved in the
compare and swap operations of the RMW cycle.
VMEbus RMW Compare (RMWC): This register defines the bits which are compared
with the data read from the VMEbus.
VMEbus RMW Swap (RMWS): This register defines the bits written to the VMEbus
when the compare is successful.
— The Target Address must be mapped to the VMEbus by one of the PCI/X
— The bits in the RMW Enable register determine which bits are compared.
are replaced with the data in the swap register and are written to the VMEbus. The bits
which do not compare are written to the VMEbus without modification.
bus-to-VME Slave images.
2. VME Interface > VME Master
Figure
9).
57
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