TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 331

IC PCI-VME BRIDGE 456PBGA

TSI148-133IL

Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets

Specifications of TSI148-133IL

Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905

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10.4.77
Table 140: DMA Status (0-1) Register
DMA Status (0-1) Register
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Register Name: DSTAx
Reset Value: 0x00000000
31:24
23:16
31:29
15:8
Bits
Bits
7:0
28
27
26
Reserved
DMA Status (0-1) Registers
The DMA Status Register (DSTA) provides the status fields for the DMA function. The BSY
field represents the current state of the DMA controller, and the remaining fields indicate
completion status. When the DMA controller is starting a transaction (that is, the DGO field is
set) the BSY field is asserted and all of the completion status fields are cleared. The BSY field
remains asserted and the completion status fields remain cleared throughout the entire DMA
transaction. Once the DMA Controller is finished, then the BSY field is cleared and only one
of the completion status fields (DON, PAU, ABT, or ERR) is asserted. A functional interrupt
is sent to the Exception module whenever the BSY field transitions to the deasserted state.
The completion status fields are prioritized from left to right, with the left most status field
holding the highest priority. For example, if the DMA Controller incurs a simultaneous ERR
error and an ABT, then the DSTA register only reflects the ERR completion status.
If the DMA Controller incurs multiple errors that are NOT simultaneously detected, then the
DSTA register only reflects the status pertaining to the first occurring error. This is of
particular importance to the PAU and ABT fields. If an error is detected before the pause or
abort takes affect, then the DSTA register only reflects the status pertaining to the error.
7
Name
ABT
ERR
PAU
Reserved
Reserved
6
N/A
Error
Abort
Pause
5
Function
ERRS
ERR
4
Reserved
Reserved
ABT
3
Reserved
Register Offset: DCSTA0: CRG + 0x504
PAU
2
PCFS
Space
Type
R
R
R
R
10. Registers > Register Map
DCSTA1: CRG + 0x584
ERT1
DON
1
Reset
P/S/L
P/S/L
P/S/L
N/A
By
ERT0
BSY
Reset
Value
0x00
0x00
0x00
0x00
0
331

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