TSI148-133IL IDT, Integrated Device Technology Inc, TSI148-133IL Datasheet - Page 134
![IC PCI-VME BRIDGE 456PBGA](/photos/6/93/69324/tsi148-133il_sml.jpg)
TSI148-133IL
Manufacturer Part Number
TSI148-133IL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133IL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
800-1905
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6. Interrupt Controller > Overview of the Interrupt Controller
6.1
6.2
6.3
134
Overview of the Interrupt Controller
Tsi148 can be programmed to act as interrupter and an interrupt handler in a VME system. As
an interrupter, Tsi148 is capable of asserting interrupts on IRQ[7:1].
As an interrupt handler, Tsi148 has seven VMEbus Interrupt Acknowledge registers which,
when read, generate an IACK cycle on the VMEbus (see
VMEbus Interrupter
Tsi148 has a VMEbus interrupter which enables software to generate VMEbus interrupts. The
interrupter operates in Release-on-Acknowledge (ROAK) mode. An 8-bit status/ID is
provided upon receiving the IACK cycle.
The following steps illustrate how a VMEbus interrupt is generated:
1. The STATUS/ID and IRQL fields must be set in the VMEbus Interrupt Control (VICR)
2. Once the interrupt is acknowledged the IRQS bit is cleared and the interrupt can be sent
Local Interrupter
Tsi148’s local interrupter provides a mechanism to control the interrupts generated by internal
and external sources. The local interrupter receives interrupts from internal and external
sources and routes them to one of four interrupt output lines (INTA_, INTB_, INTC_,
INTD_).
There are the following internal and external sources of interrupts:
•
•
•
•
register. The IRQL field defines the level of VMEbus interrupt output signals
(IRQ[7:1]O). A VMEbus interrupt is generated when the IRQL field is written. The
interrupter asserts the requested interrupt onto the VMEbus and sets the VMEbus IRQ
Status
on page
to the local bus interrupter (if enabled).
VMEbus IRQ[7:1]I_
ACFAILI_
SFAILI_
VMEbus Error
(
Only one interrupt at a time can be generated.
IRQS) bit in the VMEbus Interrupt Control (VICR) register (see
306).
Tsi148 PCI/X-to-VME Bus Bridge User Manual
Section 10.4.69 on page
80A3020_MA001_13
Section 10.4.69
306).
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