DS33X81+ Maxim Integrated Products, DS33X81+ Datasheet - Page 171

• Manufacturer Part Number: DS33X81+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X81+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0B7h:
Default
Register Name:
Register Description:
Register Address:
0B6h:
Default
Bit 11: LAN Port #2 - SRAM Queue Reset (LP2R)
Bit 10: LAN Port #1 - SRAM Queue Reset (LP1R)
To insure proper reset function, the associated MAC Transmit must be disabled before a reset. This must be done
to ensure that the Transmit MAC is not in the middle of transmitting a frame when the queue is reset. Activating
LP1R does not affect traffic on Port 2 and activating LP2R does not affect traffic on Port 1.
Bit 9: LAN Port 2 CRC Enable (LP2CE)
Bit 8: LAN Port 1 CRC Enable (LP1CE)
Bit 4: LAN Insert FIFO Reset (LIFR)
Bit 2-3: LAN Insert Insertion Point (LIIP[2:1])
If the LAN Insert is assigned to a Decapsulator that is not enabled (because of the Forwarding mode setting or
because there are no enabled WAN ports associated with that Decapsulator) then the LAN Insert has exclusive
use of that LAN Transmit Queue. For MPL > 2048, if the LAN Insert is enabled (LIE = 1), LIIP must equal 00. In
Forwarding Modes 2 and 5, only LIIP = 00 and 10 are valid. In all other cases, the recommended value is LIIP = 01
for insertion to LAN Port 1, or LIIP = 10 for insertion to LAN Port 2.
Bit 1: LAN Insert Priority (LIP)
Bit 0: LAN Insert Enable (LIE)
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = Normal operation.
1 = One-time, momentary reset of all SRAM Queue pointers associated with LAN Transmit Port 2.
0 = Normal operation.
1 = One-time, momentary reset of all SRAM Queue pointers associated with LAN Transmit Port 1.
0 = The transmit MAC will not add an Ethernet FCS (CRC) to frames before transmission.
1 = The transmit MAC adds an Ethernet FCS (CRC) to all frames before transmission.
0 = The transmit MAC will not add an Ethernet FCS (CRC) to frames before transmission.
1 = The transmit MAC adds an Ethernet FCS (CRC) to all frames before transmission.
0 = Normal – no reset.
1 = One-time, momentary reset of the LAN Insert FIFO.
00 = LAN Insert data is multiplexed with data from Decapsulator #1.
01 = LAN Insert data is multiplexed with data from Decapsulator #2.
10 = LAN Insert data is multiplexed with data from Decapsulator #3.
11 = LAN Insert data is multiplexed with data from Decapsulator #4.
0 = LAN Insert frames are lower priority than frames from the associated Decapsulator.
1 = LAN Insert frames are higher priority than frames from the associated Decapsulator.
0 = LAN Insertion is disabled.
1 = LAN Insertion is enabled.
Bit 15
Bit 7
0
0
-
-
Bit 14
Bit 6
0
0
-
-
SU.LIM
LAN Interface Mode
0B6h
Bit 13
Bit 5
0
0
-
-
Bit 12
Bit 4
LIFR
0
0
-
Bit 11
LP2R
LIIP2
Bit 3
0
0
Bit 10
LP1R
LIIP1
Bit 2
0
0
LP2CE
Bit 9
Bit 1
LIP
0
0
171 of 375
LP1CE
Bit 8
Bit 0
LIE
0
0