DS33X81+ Maxim Integrated Products, DS33X81+ Datasheet - Page 299

• Manufacturer Part Number: DS33X81+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X81+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
00C0h:
Default
00C1h:
Default
00C2h:
Default
00C3h:
Default
This register configures and initiates auto-negotiation of the external PHY device. It also enables PHY loopback.
Bit 16: Enable Comma Detect (ECD) - When set to 1, the MAC is enabled for comma detection and word
resynchronization.
Bit 14: External Loopback Enable (ELE) - When set to 1, causes the external PHY to loopback the transmit data
to the receiver.
Bit 13: Auto-Negotiation Enable (ANE) - When set to 1, the MAC will automatically negotiate the link speed with
the remote node. When equal to zero, auto-negotiation is disabled.
Bit 9: Restart Auto-Negotiation (RAN) - When set to 1 and ANE=1, the MAC will initiate auto-negotiation. This bit
will clear itself after auto-negotiation is started. Should be equal to zero during normal operation.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Reserved
Reserved
Reserved
Reserved
Bit 31
Bit 23
Bit 15
Bit 7
0
0
0
0
Reserved
Reserved
Reserved
Bit 30
Bit 22
Bit 14
Bit 6
ELE
0
0
0
0
SU.PCSCR
MAC PHYSICAL CODING SUBLAYER (PCS) CONTROL REGISTER
00C0h (indirect)
Reserved
Reserved
Reserved
Bit 29
Bit 21
Bit 13
Bit 5
ANE
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 28
Bit 20
Bit 12
Bit 4
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 27
Bit 19
Bit 11
Bit 3
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Bit 10
Bit 26
Bit 18
Bit 2
0
0
0
0
Reserved
Reserved
Reserved
Bit 25
Bit 17
RAN
Bit 9
Bit 1
0
0
0
0
Reserved
Reserved
Reserved
299 of 375
Bit 24
Bit 16
ECD
Bit 0
Bit 8
0
0
0
0