DS33X81+ Maxim Integrated Products, DS33X81+ Datasheet - Page 222

• Manufacturer Part Number: DS33X81+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X81+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

195h:
Default
Register Name:
Register Description:
Register Address:
194h:
Default
Bit 8: LAN Queue Scheduling Mode (LQSM)
Bit 6-7: LAN Queue 4 Round Robin Weighting (LQ4RRW [2:1])
Bit 4-5: LAN Queue 3 Round Robin Weighting (LQ3RRW [2:1])
Bit 2-3: LAN Queue 2 Round Robin Weighting (LQ2RRW [2:1])
Bit 0-1: LAN Queue 1 Round Robin Weighting (LQ1RRW [2:1])
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = Strict Priority scheduling between LAN Queues within the same LAN Queue Group (enabled for all 4
LAN Queue Groups) and the WAN Insert Channel
1 = Weighted Round Robin (WRR) Scheduling between LAN Queues within LAN Queue Group #1
and with the WAN Insert Channel. When LQSM = 1, the other 3 LAN Queue Groups (12 LAN Queues)
are not allowed. WRR Scheduling mode is only available in Forwarding Mode 2, with a single LAN
Port enabled.
00: Round Robin Weight = 1
01: Round Robin Weight = 2
10: Round Robin Weight = 4
11: Round Robin Weight = 8
00: Round Robin Weight = 1
01: Round Robin Weight = 2
10: Round Robin Weight = 4
11: Round Robin Weight = 8
00: Round Robin Weight = 1
01: Round Robin Weight = 2
10: Round Robin Weight = 4
11: Round Robin Weight = 8
00: Round Robin Weight = 1
01: Round Robin Weight = 2
10: Round Robin Weight = 4
11: Round Robin Weight = 8
LQ4RRW-2
Bit 15
Bit 7
0
0
-
LQ4RRW-1
Bit 14
Bit 6
0
0
-
AR.LQSC
LAN Queue Scheduling Control
194h
LQ3RRW-2
Bit 13
Bit 5
0
0
-
LQ3RRW -1
Bit 12
Bit 4
0
0
-
LQ2RRW-2
Bit 11
Bit 3
0
0
-
LQ2RRW-1
Bit 10
Bit 2
0
0
-
LQ1RRW-2
Bit 9
Bit 1
0
0
-
LQ1RRW-1
222 of 375
LQSM
Bit 8
Bit 0
0
0