DS33X81+ Maxim Integrated Products, DS33X81+ Datasheet - Page 58

IC MAPPING ETHERNET 256CSBGA

DS33X81+

Manufacturer Part Number
DS33X81+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X81+

Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.14 Flow Control
In some applications, Flow Control may be required to ensure that data queues do not overflow and frames are not
dropped. The device allows for optional IEEE 802.3 Compliant flow control. There are 2 basic mechanisms of flow
control:
Several conditions can initiate the flow control mechanism:
The Pause time value that is transmitted in outgoing Pause frames is user-programmable in the SU.MACFCR
register. Note that Pause control frame transmission must also be enabled with the SU.MACFCR.TFE bit. Pause
frame receipt must be enabled with SU.MACFCR.RFE. Although not commonly used, Unicast Pause frame
reception can be enabled with SU.MACFCR.UP.
The Watermark value programmed into AR.LQW is in units of memory from the top of the queue, thus a larger
value in AR.LQW indicates that more memory will remain available in the queue when flow control is exerted. Note
that in order to use flow control, the minimum LAN queue size is 2 frames (of maximum size) deep and the LAN
queue watermark threshold (AR.LQW) must be set to allow a minimum of 1 frame of maximum size to be received
after the threshold is crossed. If the Watermark is set too close to the top of the queue to allow time for the remote
node to respond, automatic flow control will not be effective.
In some applications, Ethernet flow control can interfere with higher-layer flow control protocols. For example,
TCP/IP flow control depends on lost frames in order to detect when it has exceeded a system’s capabilities. TCP/IP
flow control uses an increasing flow rate until lost frames are detected, at which point a back-off & resend algorithm
is used, based on the number of lost frames until a steady stream is maintained. If no frames are lost, TCP/IP will
continue attempting to increase the flow rate. If TCP/IP flow control is used in conjunction with Ethernet Flow
control, the results may be undesirable for some applications. The system architect should carefully study this
topic to determine if the system in design should use Ethernet flow control or frame discarding. The
DS33X162 family of devices support both flow control and frame discarding.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
In half duplex mode, a jam sequence is sent that causes a collision detection at the far end. The collision
causes the transmitting node to reduce the rate of transmission.
In full duplex mode, flow control is initiated by the receiving node sending a pause frame. The pause frame
contains a time parameter that determines the pause timeout to be used by the transmitting node.
Flow Control can be initiated by a LAN Queue filling above the Watermark programmed in AR.LQW. Flow
Control for each LAN Queue is independanty enabled in the SU.LQXPC register. Note that the LAN
Queues are external DDR SDRAM buffers used to store data that has arrived on the MII/RMII/GMII
interface(s) and has been processed by the receive MAC.
Flow Control can be initiated by the CIR Policing function. More information on this function can be found
in Section 8.21.
Transmission of a pause frame can be manually initiated by writing a 1 to SU.MACFCR.FCB.
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