DS33X81+ Maxim Integrated Products, DS33X81+ Datasheet - Page 182

• Manufacturer Part Number: DS33X81+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X81+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0D9h:
Default
Register Name:
Register Description:
Register Address:
0D8h:
Default
Bits 0-13: Maximum Packet Length (MPL [14:1]) Maximum frame length, in bytes. The receive MAC discards
Ethernet frame received from the LAN interface that have a frame length greater than the user configured MPL
value. This value is applied to both Ethernet ports. If the device has been configured to discard the Ethernet FCS
then the byte count up to the FCS is used. If the FCS is retained, then the count includes 4 bytes for the FCS. The
maximum valid value for this register is 10240 bytes. Note that frames between 9018 and 10240 bytes may be
counted as “giant frames” by the MAC.
Table 10-5. Valid Conditions for MPL > 2048
Description
Forwarding Mode
Priority
Scheduling
LAN Port Mode
LAN Port 2
Enable
Port 1 Policing
Bridge Filter
LAN Insert
LAN Extract
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Bit 15
MPL8
Bit 7
0
1
-
Register / Bit
GL.CR1
AR.LQSC.LQSM
SU.LPM.LPM
SU.LP2C.LP2E
SU.L1PP.L1PM[2:1]
SU.BFC.BFE
SU.LIM.LIIP[2:1]
SU.LPM.LEEPS
Bit 14
MPL7
Bit 6
0
1
-
.
FMC
SU.MPL
LAN Maximum Packet Length
0D8h
MPL14
Bit 13
MPL6
Bit 5
0
1
Jumbo Frames
Supported When
= 0
= 0
= 0
= 00
= 0
= 00
= 0
= 001
MPL13
Bit 12
MPL5
Bit 4
0
1
MPL12
Bit 11
MPL4
Bit 3
Comments
Forwarding mode 2 only.
Only no priority or strict priority scheduling
supported.
For dual port devices, Single Port Mode
must be used.
For dual port devices, port 2 must be
disabled.
Port policing must be disabled.
Bridge filter must be disabled.
If LAN Insert is enabled.
If LAN Extract is enabled (LPM enables).
0
1
MPL11
Bit 10
MPL3
Bit 2
1
1
MPL10
MPL2
Bit 9
Bit 1
0
1
182 of 375
MPL9
MPL1
Bit 8
Bit 0
1
1