HD64570F16 Renesas Electronics America, HD64570F16 Datasheet - Page 154

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HD64570F16

Manufacturer Part Number
HD64570F16
Description
IC SCA SRL COMM ADAPTER 88QFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64570F16

Applications
ISDN
Interface
Serial
Voltage - Supply
4.75 V ~ 5.25 V
Package / Case
88-QFP
Mounting Type
Surface Mount
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bit 3 (CCTS: CTS Line Level Change): Indicates whether or not the CTS line level has
changed. This bit is cleared when 1 is written to this bit position.
Bit 2 (CDCD: DCD Line Level Change): Indicates whether or not the DCD line level has
changed. This bit is cleared when 1 is written to this bit position.
Bit 1 (BRKD/ABTD: Break Start Detection/Abort Detection): Indicates the detection of a
break start (space state) in asynchronous mode or an abort in bit synchronous HDLC mode. This
bit is cleared when 1 is written to this bit position.
Bit 0 (BRKE/IDLD: Break End Detection/Idle Start Detection): Indicates the detection of a
break end in asynchronous mode, or an idle start in bit synchronous mode. This bit is cleared
when 1 is written to this bit position.
Rev. 0, 07/98, page 138 of 453
Asynchronous/Byte synchronous/Bit synchronous mode
CCTS = 0:
CCTS = 1:
Asynchronous/Byte synchronous/Bit synchronous mode
CDCD = 0:
CDCD = 1:
Asynchronous mode
BRKD = 0:
BRKD = 1:
Byte synchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
Bit synchronous mode
ABTD = 0:
ABTD = 1:
Asynchronous mode
BRKE = 0:
BRKE = 1:
Byte synchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
Bit synchronous mode
IDLD = 0:
IDLD = 1:
Indicates that the CTS line level has not changed
Indicates that the CTS line level has changed
Indicates that the DCD line level has not changed
Indicates that the DCD line level has changed
Indicates that no break start has been detected
Indicates that a break start has been detected
Indicates that no abort has been detected
Indicates that an abort has been detected in bit synchronous HDLC mode
Indicates that no break end has been detected
Indicates that a break end has been detected
Indicates that no idle start has been detected
Indicates that an idle start has been detected

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