HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 5

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
ADC1413D_SER
Product data sheet
Table 2.
Symbol
INBP
VDDA
VDDA
SCLK
SDIO
CS
CFG1
CFG2
CFG3
VDDD
DGND
DGND
DGND
VDDD
CMLPB
CMLNB
VDDD
DGND
DGND
VDDD
CMLNA
CMLPA
VDDD
DGND
DGND
SYNCP
SYNCN
DGND
VDDD
SWING_0
SWING_1
AGND
RESET
SCRAMBLER
CFG0
DNC
VDDA
AGND
AGND
Pin description
All information provided in this document is subject to legal disclaimers.
Pin
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
Rev. 5 — 9 February 2011
…continued
I
P
P
G
I
G
G
G
Type
I
I/O
I
I
I/O
I/O
I/O
I/O
P
G
G
G
P
O
O
P
G
G
P
O
O
P
G
G
I
I
P
I
I
O
P
[1]
Description
channel B analog input
analog power supply 3 V
analog power supply 3 V
SPI clock
SPI data input/output
chip select
analog ground
JEDEC digital IP reset
scrambler enable and disable
See
See
See
See
digital power supply 1.8 V
digital ground
digital ground
digital ground
digital power supply 1.8 V
channel B output
channel B complementary output
digital power supply 1.8 V
digital ground
digital ground
digital power supply 1.8 V
channel A complementary output
channel A output
digital power supply 1.8 V
digital ground
digital ground
synchronization from FPGA
synchronization from FPGA
digital ground
digital power supply 1.8 V
JESD204 serial buffer programmable output swing
JESD204 serial buffer programmable output swing
do not connect
analog power supply 3 V
analog ground
analog ground
Dual 14-bit ADC; serial JESD204A interface
Table 28
Table 28
Table 28
Table 28
ADC1413D series
(input) or OTRA (output)
(input) or OTRB (output)
(input)
(input)
© NXP B.V. 2011. All rights reserved.
[2]
[2]
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