HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 7

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HSDC-JAKIT1W2/DB

Manufacturer Part Number
HSDC-JAKIT1W2/DB
Description
DAC/ADC LATTICE KIT
Manufacturer
NXP Semiconductors
Series
-r

Specifications of HSDC-JAKIT1W2/DB

Main Purpose
Interface, ADC/DAC for Lattice ECP3 FPGA
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
ADC1413D, DAC1408D, ECP3 FPGA
Primary Attributes
Loop Back Demo with 2 High Speed Converters
Secondary Attributes
USB Powered
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6898
NXP Semiconductors
9. Static characteristics
Table 5.
ADC1413D_SER
Product data sheet
Symbol
Supplies
V
V
I
I
P
P
Clock inputs: pins CLKP and CLKM (AC-coupled)
Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
V
SINE
V
Low Voltage Complementary Metal Oxide Semiconductor (LVCMOS)
V
V
Logic inputs: Power-down: pins CFG0 to CFG3, SCRAMBLER, SWING_0, SWING_1, and RESET
V
V
I
I
SPI: pins CS, SDIO, and SCLK
V
V
I
I
C
Analog inputs: pins INAP, INAM, INBP, and INBM
I
R
C
V
DDA
DDD
IL
IH
IL
IH
I
DDA
DDD
tot
i(clk)dif
i(clk)dif
IL
IH
IL
IH
IL
IH
I(cm)
I
I
I
Static characteristics
Parameter
analog supply voltage
digital supply voltage
analog supply current
digital supply current
total power dissipation
power dissipation
differential clock input
voltage
differential clock input
voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
input current
input resistance
input capacitance
common-mode input
voltage
[1]
Conditions
f
f
f
f
f
f
f
f
Power-down mode
Standby mode
peak-to-peak
peak
track mode
track mode
track mode
track mode
All information provided in this document is subject to legal disclaimers.
clk
i
clk
i
clk
clk
clk
clk
= 70 MHz
= 70 MHz
= 65 Msps
= 125 Msps;
= 125 Msps;
= 125 Msps
= 105 Msps
= 80 Msps
Rev. 5 — 9 February 2011
Min
2.85
1.65
-
-
-
-
-
-
-
-
-
-
-
0.7V
-
-
6
30
0
0.7V
10
50
-
5
-
-
0.9
Dual 14-bit ADC; serial JESD204A interface
DDA
DDA
ADC1413D series
Typ
3.0
1.8
343
150
1270
1150
995
885
30
200
1.6
3.0
-
-
0
0.66V
-
-
-
-
-
-
4
-
15
5
1.5
DDD
Max
3.4
1.95
-
-
-
-
-
-
-
-
-
-
0.3V
-
-
-
+6
+30
0.3V
V
+10
+50
-
+5
-
-
2
DDA
© NXP B.V. 2011. All rights reserved.
DDA
DDA
Unit
V
V
mA
mA
mW
mW
mW
mW
mW
mW
V
V
V
V
V
V
A
A
V
V
A
A
pF
A
pF
V
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