HSDC-JAKIT1W2/DB NXP Semiconductors, HSDC-JAKIT1W2/DB Datasheet - Page 8

• Manufacturer Part Number: HSDC-JAKIT1W2/DB
• Description: DAC/ADC LATTICE KIT
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of HSDC-JAKIT1W2/DB

• Main Purpose: Interface, ADC/DAC for Lattice ECP3 FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: ADC1413D, DAC1408D, ECP3 FPGA
• Primary Attributes: Loop Back Demo with 2 High Speed Converters
• Secondary Attributes: USB Powered
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6898

NXP Semiconductors
Table 5.
ADC1413D_SER
Product data sheet
Symbol
B
V
Voltage controlled regulator output: pins VCMA and VCMB
V
I
Reference voltage input/output: pin VREF
V
Data outputs: pins CMLPA, CMLNA
Output levels, V
V
V
Output levels, V
V
V
Output levels, V
V
V
Output levels, V
V
V
Output levels, V
V
V
Serial configuration: pins SYNCCP, SYNCCN
V
V
Accuracy
INL
O(cm)
i
I(dif)
O(cm)
VREF
OL
OH
OL
OH
OL
OH
OL
OH
OL
OH
IL
IH
Static characteristics
Parameter
input bandwidth
differential input voltage
common-mode output
voltage
common-mode output
current
voltage on pin VREF
LOW-level output
voltage
HIGH-level output
voltage
LOW-level output
voltage
HIGH-level output
voltage
LOW-level output
voltage
HIGH-level output
voltage
LOW-level output
voltage
HIGH-level output
voltage
LOW-level output
voltage
HIGH-level output
voltage
LOW-level input voltage
HIGH-level input voltage differential; input
integral non-linearity
DDD
DDD
DDD
DDD
DDD
= 1.8 V; SWING_SEL[2:0] = 000
= 1.8 V; SWING_SEL[2:0] = 001
= 1.8 V; SWING_SEL[2:0] = 010
= 1.8 V; SWING_SEL[2:0] = 011
= 1.8 V; SWING_SEL[2:0] = 100
[1]
…continued
Conditions
peak-to-peak
output
input
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
DC coupled; output
AC coupled
differential; input
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 9 February 2011
Min
-
1
-
-
0.5
0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual 14-bit ADC; serial JESD204A interface
ADC1413D series
Typ
600
-
V
4
-
-
1.5
1.35
1.8
1.65
1.45
1.275
1.8
1.625
1.4
1.8
1.35
1.125
1.8
1.575
1.3
1.05
1.8
1.55
0.95
1.47
5
1.2
1.6
DDA
/ 2
Max
-
2
-
-
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2011. All rights reserved.
Unit
MHz
V
V
mA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
LSB
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