H5PS1G83EFR-S6C HYNIX SEMICONDUCTOR, H5PS1G83EFR-S6C Datasheet - Page 25

58T1895

H5PS1G83EFR-S6C

Manufacturer Part Number
H5PS1G83EFR-S6C
Description
58T1895
Manufacturer
HYNIX SEMICONDUCTOR
Datasheet

Specifications of H5PS1G83EFR-S6C

Memory Type
SDRAM
Memory Configuration
128M X 8
Access Time
15ns
Memory Case Style
FBGA
No. Of Pins
60
Operating Temperature Range
0°C To +85°C
Memory Size
1 Gbit
Rohs Compliant
Yes

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Internal write to read command delay
Internal read to precharge command delay
Exit self refresh to a non-read command
Exit self refresh to a read command
Exit precharge power down to any non-read
command
Exit active power down to read command
Exit active power down to read command
(Slow exit, Lower power)
CKE minimum pulse width
(HIGH and LOW pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
Rev. 0.4 / Nov 2008
Parameter
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
tCKE
tAOFD
tAOFPD
tOIT
tDelay
tAOND
tAON
tAONPD
tAOF
tANPD
tAXPD
Symbol
tIS + tCK (avg)
tAC(min)+2
tRFC + 10
tAC(min)
tAC(min)
tAC(min)
7 - AL
+ tIH
min
200
2.5
7.5
7.5
+2
2
3
2
3
8
0
2
DDR2-667
tAC(max)+ 0.6
2.5tCK(avg)+
tAC(max)+1
tAC(max)+1
2tCK(avg)+
tAC(max)
max
+0.7
2.5
12
2
-
-
-
tRFC + 10
tIS + tCK
tAC(min)
tAC(min)
tAC(min)
tAC(min)
8 - AL
(avg)
+ tIH
min
200
7.5
7.5
+2
2.5
+2
2
3
2
3
8
0
2
DDR2-800
2.5tCK(avg)+
tAC(max)+1
tAC(max)+1
2tCK(avg)+
tAC(max)
tAC(max)
max
+0.7
+0.6
2.5
12
2
-
-
-
H5PS1G43EFR
H5PS1G83EFR
H5PS1G63EFR
-Continued-
Unit
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
6,16,40
17,43,4
24,32
17,45
3,32
1, 2
32
27
16
15
32
1
5
25

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