IBM25PPC750FL-GR0133T IBM MICROELECTRONICS, IBM25PPC750FL-GR0133T Datasheet - Page 3

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IBM25PPC750FL-GR0133T

Manufacturer Part Number
IBM25PPC750FL-GR0133T
Description
MPU 750xx RISC 32-Bit 0.13um 600MHz 1.8V/2.5V/3.3V 750-Pin CBGA Tray
Manufacturer
IBM MICROELECTRONICS
Datasheet

Specifications of IBM25PPC750FL-GR0133T

Package
750CBGA
Device Core
PowerPC
Family Name
750xx
Number Of Cpu Cores
1
Data Bus Width
32 Bit
Maximum Speed
600 MHz
I/o Voltage
1.8|2.5|3.3 V
Operating Temperature
-40 to 105 °C
Preliminary
Contents
List of Figures ................................................................................................................. 5
List of Tables ................................................................................................................... 7
1. General Information .................................................................................................... 9
2. Overview .................................................................................................................... 14
3. Electrical and Thermal Characteristics ................................................................... 16
4. Dimensions and Signal Assignments ..................................................................... 29
5. System Design Information ..................................................................................... 38
750flds60TOC.fm.6.0
April 27, 2007
1.1 Features ............................................................................................................................................ 9
1.2 Design Level Considerations and Features .................................................................................... 12
1.3 Processor Version Register ............................................................................................................ 12
1.4 Part Number Information ................................................................................................................. 13
2.1 Block Diagram ................................................................................................................................. 14
2.2 General Parameters ........................................................................................................................ 15
3.1 dc Electrical Characteristics ............................................................................................................ 16
3.2 Clock ac Specifications ................................................................................................................... 20
3.3 Spread Spectrum Clock Generator ................................................................................................. 21
3.4 60x Bus Input ac Specifications ...................................................................................................... 22
3.5 60x Bus Output ac Specifications ................................................................................................... 24
3.6 Alternate I/O Timing for 3.3 V Bus .................................................................................................. 26
4.1 Module Substrate Decoupling Voltage Assignments ...................................................................... 29
4.2 Package .......................................................................................................................................... 29
4.3 Microprocessor Ball Placement ....................................................................................................... 31
4.4 Pinout Listings ................................................................................................................................. 32
5.1 PLL Considerations ......................................................................................................................... 38
5.2 PLL Power Supply Filtering ............................................................................................................. 42
5.3 Decoupling Recommendations ....................................................................................................... 46
5.4 Output Buffer dc Impedance ........................................................................................................... 49
5.5 Level Protection .............................................................................................................................. 55
5.6 64- or 32-Bit Data Bus Mode ........................................................................................................... 56
5.7 I/O Voltage Mode Selection ............................................................................................................ 56
5.8 Thermal Management ..................................................................................................................... 56
3.6.1 IEEE 1149.1 ac Timing Specifications ................................................................................... 27
5.1.1 Restrictions and Considerations for PLL Configuration ......................................................... 39
5.1.2 PLL_RNG[0:1] Definitions for Dual PLL Operation ................................................................ 40
5.1.3 PLL Configuration .................................................................................................................. 40
5.4.1 Input-Output Use ................................................................................................................... 50
5.8.1 Heat Sink Selection Example ................................................................................................ 57
5.1.1.1 Configuration Restriction on Frequency Transitions ...................................................... 39
PowerPC 750FL RISC Microprocessor
Page 3 of 65
Contents

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