IBM25PPC750FL-GR0133T IBM MICROELECTRONICS, IBM25PPC750FL-GR0133T Datasheet - Page 53

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IBM25PPC750FL-GR0133T

Manufacturer Part Number
IBM25PPC750FL-GR0133T
Description
MPU 750xx RISC 32-Bit 0.13um 600MHz 1.8V/2.5V/3.3V 750-Pin CBGA Tray
Manufacturer
IBM MICROELECTRONICS
Datasheet

Specifications of IBM25PPC750FL-GR0133T

Package
750CBGA
Device Core
PowerPC
Family Name
750xx
Number Of Cpu Cores
1
Data Bus Width
32 Bit
Maximum Speed
600 MHz
I/o Voltage
1.8|2.5|3.3 V
Operating Temperature
-40 to 105 °C
Table 5-6. Input/Output Use (Sheet 3 of 4)
SYSCLK
TA
TBEN
TBST
TCK
TDI
TDO
TEA
TLBISYNC
TMS
TRST
TS
TSIZ[0:2]
Notes:
750FL Micropro-
1. Depends on the system design. The electrical characteristics of the 750FL microprocessor do not add additional constraints to the system design. Therefore, whatever is
2. HRESET, SRESET, and TRST are signals used for ESP and RISCWatch to enable the correct operation of the debuggers. Logical AND gates must be placed between
3. The 750FL microprocessor provides protection from metastability on inputs through the use of a “keeper” circuit on specific inputs. See Section 5.5 Level Protection on
4. If a system design requires a signal level to be maintained while not being actively driven, an external resistor or device must be used (keepers assure no metastability of
5. The 750FL microprocessor does not require external pullups on address and data lines. Control lines must be treated individually.
cessor Signal
done with the net depends on the system requirements.
these signals and 750FL microprocessor. (See Figure 5-7 IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector on page 55.)
page 55 for a more detailed description.
inputs but do not guarantee a level).
Name
Active Level
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Input/Output
Input/Output
Output
Output
Output
Input/
Input
Input
Input
Input
Input
Input
Input
Input
Input
Transfer Attributes
Transfer Attributes
Data Termination
Data Termination
Usage Group
Clock Control
Address Start
Control
JTAG
JTAG
JTAG
JTAG
JTAG
Input/Output with
Pullup Resistors
Enabled high
Enabled high
Enabled high
Not enabled
Internal
Level Protect
enabled
enabled
enabled
Keeper
Keeper
Keeper
Internal
Keeper
Keeper
Keeper
Internal
Internal
Keeper
Keeper
No resistor by
Required
pulldown
External
Resistor
External
design
5k Ω
Active driver
Active driver
5k Ω to GND
50 μA at 2.5 V
25 μA at 1.8 V
(the pullup current for the inter-
nal resistor)
Active driver or pullup
Must be actively driven
50 μA at 2.5 V
25 μA at 1.8 V
(the pullup current for the inter-
nal resistor)
50 μA at 2.5 V
25 μA at 1.8 V
(the pullup current for the inter-
nal resistor)
Pullup required to OV
Comments
DD
3, 4, 5
3, 4, 5
1, 3, 4
3, 4, 5
3, 4, 5
1, 3, 4
Notes
3, 4
3, 4
2, 5
5
5
5

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