IBM25PPC750FL-GR0133T IBM MICROELECTRONICS, IBM25PPC750FL-GR0133T Datasheet - Page 46

• Manufacturer Part Number: IBM25PPC750FL-GR0133T
• Description: MPU 750xx RISC 32-Bit 0.13um 600MHz 1.8V/2.5V/3.3V 750-Pin CBGA Tray
• Manufacturer: IBM MICROELECTRONICS

Specifications of IBM25PPC750FL-GR0133T

• Package: 750CBGA
• Device Core: PowerPC
• Family Name: 750xx
• Number Of Cpu Cores: 1
• Data Bus Width: 32 Bit
• Maximum Speed: 600 MHz
• I/o Voltage: 1.8|2.5|3.3 V
• Operating Temperature: -40 to 105 °C

PowerPC 750FL RISC Microprocessor
5.3 Decoupling Recommendations
Capacitor decoupling is required for the 750FL microprocessor. Decoupling capacitors act to reduce high
frequency chip switching noise and provide localized bulk charge storage to reduce major power-surge
effects.
High frequency decoupling capacitors must be located as close as possible to the processor with low lead
inductance to the ground and voltage planes.
Decoupling capacitors are recommended on the back of the card, directly opposite the module. The recom-
mended placement and number of decoupling capacitors, 34 V
capacitors, are described in Figure 5-5 Orientation and Layout of the 750FL Microprocessor Decoupling
Capacitors on page 48. The recommended decoupling capacitor specifications are provided in Table 5-4.
The placement and use described here are guidelines for decoupling capacitors and must be applied for
system designs.
Table 5-4. Recommended Decoupling Capacitor Specifications
The decoupling capacitor electrodes are located directly opposite from their corresponding BGA pins where
possible. Also, each electrode for each decoupling capacitor needs to be connected to one or more BGA pins
(balls) with a short electrical path. Thus, through-vias, adjacent to the decoupling capacitors, are recom-
mended.
The card designer can expand on the decoupling capacitor recommendations by using the following tech-
niques:
For more information on power layout and bypassing, see the IBM application note, PowerPC 750FX Layout
and Bypassing.
System Design Information
Page 46 of 65
Decoupling capacitor specifications:
Recommended minimum number of decoupling capacitors on the back of the card:
• Adding additional decoupling capacitors.
• Adding additional through vias or blind vias.
If using additional decoupling capacitors, verify that these additional capacitors do not reduce the number
of card vias or cause the vias to lose proximity to each capacitor electrode.
Card technologies are available that reduce the inductance between the decoupling capacitor and the
BGA pin (ball). Replacing single vias with multiple vias is very effective. Place GND vias close to V
OV
DD
vias to reduce loop inductance.
Item
DD
- GND capacitors and 44 OV
Type X5R or Y5V
10 V minimum
0402 size
1.0 mm × 0.5 mm±0.1 mm on both dimensions
(40 × 20 mils, nominally)
100 nF
34 V
44 OV
DD
DD
-GND caps
-GND caps
Description
DD
750flds60.fm.6.0
Preliminary
April 27, 2007
- GND
DD
or