IBM25PPC750FL-GR0133T IBM MICROELECTRONICS, IBM25PPC750FL-GR0133T Datasheet - Page 42

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IBM25PPC750FL-GR0133T

Manufacturer Part Number
IBM25PPC750FL-GR0133T
Description
MPU 750xx RISC 32-Bit 0.13um 600MHz 1.8V/2.5V/3.3V 750-Pin CBGA Tray
Manufacturer
IBM MICROELECTRONICS
Datasheet

Specifications of IBM25PPC750FL-GR0133T

Package
750CBGA
Device Core
PowerPC
Family Name
750xx
Number Of Cpu Cores
1
Data Bus Width
32 Bit
Maximum Speed
600 MHz
I/o Voltage
1.8|2.5|3.3 V
Operating Temperature
-40 to 105 °C
PowerPC 750FL RISC Microprocessor
5.2 PLL Power Supply Filtering
The 750FL microprocessor has two separate AV
clock generation phase-locked loops.
Most designs are expected to use a single PLL configuration mode throughout the application. These type of
designs must use the default configuration, A1V
(AGND) through a 100 Ω resistor. This is shown Figure 5-1 Single PLL Power Supply Filter Circuit with
A1VDD Pin and A2VDD Pin Tied to GND on page 43.
For designs planning to optimize power savings through dynamic switching between these dual PLL circuits,
it is recommended, though not required, that each AV
To ensure the stability of the internal clock, the power supplied to the AV
using a circuit similar to the one shown in Figure 5-1 on page 43. The circuit must be placed as close as
possible to the AV
For descriptions of the sample PLL power supply filtering circuits, see Table 5-3.
Table 5-3. Sample PLL Power Supply Filtering Circuits
System Design Information
Page 42 of 65
Single PLL circuit configuration that uses the A1V
and ties the A2V
Single PLL circuit configuration that uses both the
A1V
Dual PLL configuration that uses a separate circuit
for the A1V
Notes:
1. Optional configurations are supported, though not recommended.
2. This circuit design can be used with the dual PLL feature enabled, though optimum power savings might not be realized.
3. This circuit design can be used with the dual PLL feature enabled to optimize power savings.
DD
For additional information, see Figure 5-3 Dual PLL Power Supply Filter Circuits on page 45.
and the A2V
DD
pin and for the A2V
DD
Circuit Description
pin to GND
DD
DD
pins and a single ferrite bead
pin to ensure that it filters out as much noise as possible.
DD
the pin
Samples of PLL Power Supply Filtering Circuits
DD
Number of
Filtering
Circuits
DD
1
1
2
DD
(PLL0), and tie the A2V
signals (A1V
DD
Ferrite
Beads
have a separate voltage input and filter circuit.
1
1
2
Figure 5-1 on page 43
Figure 5-2 on page 44
Figure 5-3 on page 45
DD
Circuit Figure
and A2V
DD
DD
input signals must be filtered
DD
(PLL1) signal to ground
) that provide power to the
Recommended
Circuit Design
Optional
Yes
Yes
750flds60.fm.6.0
Preliminary
April 27, 2007
Notes
1, 2
2, 3

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