CY8C5248LTI-030 Cypress Semiconductor Corp, CY8C5248LTI-030 Datasheet - Page 55

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CY8C5248LTI-030

Manufacturer Part Number
CY8C5248LTI-030
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5248LTI-030

Lead Free Status / Rohs Status
Compliant
Table 11-3. AC Specifications
Document Number: 001-66236 Rev. *A
F
F
Svdd
T
T
T
T
Notes
Parameter
17. IBased on device characterization (Not production tested).
STARTUP
SLEEP
IO_INIT
CPU
BUSCLK
HIBERNATE
CPU frequency
Bus frequency
V
Time from V
≥ IPOR to I/O ports set to their reset
states
Time from V
≥ min operating voltage to CPU
executing code at reset vector
Wakeup from limited active mode –
Application of non-LVD interrupt to
beginning of execution of next CPU
instruction
Wakeup form hibernate mode –
Application of external interrupt to
beginning of execution of next CPU
instruction
DD
ramp rate
Description
DDD
DDD
/V
/V
DDA
DDA
[17]
/V
/V
CCD
CCD
/V
/V
CCA
CCA
PRELIMINARY
No PLL used, IMO boot mode
12 MHz typ.
Conditions
PSoC
®
5: CY8C52 Family Datasheet
Min
DC
DC
Typ
20
40.01
40.01
Max
100
10
66
1
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Units
MHz
MHz
V/ns
µs
µs
µs
µs

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