CY8C5248LTI-030 Cypress Semiconductor Corp, CY8C5248LTI-030 Datasheet - Page 83

no-image

CY8C5248LTI-030

Manufacturer Part Number
CY8C5248LTI-030
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5248LTI-030

Lead Free Status / Rohs Status
Compliant
11.8.3 SWD Interface
Table 11-55. SWD Interface AC Specifications
11.8.4 TPIU Interface
Table 11-56. TPIU Interface AC Specifications
Document Number: 001-66236 Rev. *A
f_SWDCK
T_SWDI_setup SWDIO input setup before SWDCK high T = 1/f_SWDCK max
T_SWDI_hold
T_SWDO_valid SWDCK high to SWDIO output
T_SWDO_hold SWDIO output hold after SWDCK low
Notes
35. Based on device characterization (Not production tested).
36. f_TCK must also be no more than 1/3 CPU clock frequency.
37. f_SWDCK must also be no more than 1/3 CPU clock frequency.
38. SWV signal frequency and bit rate are limited by GPIO output frequency, see
Parameter
Parameter
SWDCLK frequency
SWDIO input hold after SWDCK high
SWV bit rate
Description
Description
PRELIMINARY
[35]
[35]
3.3 V ≤ V
2.7 V ≤ V
2.7 V ≤ V
USBIO pins
T = 1/f_SWDCK max
T = 1/f_SWDCK max
T = 1/f_SWDCK max
“GPIO AC Specifications”
DDD
DDD
DDD
Conditions
Conditions
PSoC
≤ 5 V
< 3.3 V
< 3.3 V, SWD over
®
5: CY8C52 Family Datasheet
on page 59.
Min
Min
T/4
T/4
T/4
Typ
Typ
5.5
33
12
Max
Max
2T/5
7
Page 83 of 95
[37]
[38]
[37]
[37]
Units
Units
MHz
MHz
MHz
Mbit

Related parts for CY8C5248LTI-030