ATxmega32A4U Atmel Corporation, ATxmega32A4U Datasheet - Page 201

• Manufacturer Part Number: ATxmega32A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega32A4U

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.11 Register Summary
15.12 Interrupt Vector Summary
Table 15-6.
Note:
8331A–AVR–07/11
+0x10 to +0x1F
+0x22 to +0x25
+0x30 to +0x3F
Address
+0x02D
+0x0A
+0x0B
+0x0C
+0x0D
+0x0E
+0x2A
+0x2B
+0x2C
+0x2E
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0F
+0x20
+0x21
+0x26
+0x27
+0x28
+0x29
+0x2F
Offset
0x0A
0x00
0x02
1. Only available on Timer/Counter with 4 Compare or Capture channels 16-bit.
0x4
0x6
0x8
Name
CTRLA
CTRLB
CTRLC
Reserved
CTRLE
Reserved
INTCTRLA
INTCTRLB
Reserved
CTRLF
Reserved
Reserved
INTFLAGS
Reserved
Reserved
Reserved
Reserved
CNTL
CNTH
Reserved
PERL
PERH
CMPLA
CMPHA
CMPLB
CMPHB
CMPLC
CMPHC
CMPLD
CMPHD
Reserved
Timer/Counter
Source
OVF_vect
ERR_vect
CCA_vect
CCB_vect
CCC_vect
CCD_vect
Interrupt vectors and their word offset addresses
CMPHDEN
CMPLDIF
CMPHD
(1)
(1)
Bit 7
CMPLDINTLVL[1:0]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
CMPHCEN
CMPLCIF
CMPHC
Bit 6
Interrupt Description
Timer/Counter Overflow/Underflow Interrupt vector offset
Timer/Counter Error Interrupt vector offset
Timer/Counter Compare or Capture Channel A Interrupt vector offset
Timer/Counter Compare or Capture Channel B Interrupt vector offset
Timer/Counter Compare or Capture Channel C Interrupt vector offset
Timer/Counter Compare or Capture Channel D Interrupt vector offset
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
CMPHBEN
CMPLBIF
CMPHB
Bit 5
CMPLCINTLVL[1:0]
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
High Byte Timer/Counter Period Register
High Byte Timer/Counter Count Register
Low Byte Timer/Counter Period Register
Low Byte Timer/Counter Count Register
CMPHAEN
High Byte Compare Register A
High Byte Compare Register B
High Byte Compare Register C
High Byte Compare Register D
Low Byte Compare Register A
Low Byte Compare Register B
Low Byte Compare Register C
Low Byte Compare Register D
CMPLAIF
CMPHA
Bit 4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
CMPLDEN
CMPLD
Bit 3
CMPLBINTLVL[1:0]
–
–
–
–
–
–
–
–
–
–
–
–
–
UNFHINTLVL[1:0]
Atmel AVR XMEGA AU
CMD[1:0]
CMPLCEN
CMPLC
Bit 2
–
–
–
–
–
–
–
–
–
–
–
–
–
CLKSEL[3:0]
CMPLBEN
UNFHIF
CMPLB
Bit 1
–
–
–
–
–
–
–
–
–
–
–
CMPLAINTLVL[1:0]
UNFLINTLVL[1:0]
CMDEN[1:0]
BYTEM[1:0]
CMPLAEN
CMPLA
UNFLIF
Bit 0
–
–
–
–
–
–
–
–
–
–
–
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