ATxmega32A4U Atmel Corporation, ATxmega32A4U Datasheet - Page 319

• Manufacturer Part Number: ATxmega32A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega32A4U

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.4.2
8331A–AVR–07/11
DMA Support
Figure 25-3. The key memory with pointers and register.
In the AES crypto module, the following definition of the key is used:
In decryption mode, the key expansion procedure must be executed by software before opera-
tion with the AES crypto module so that the last subkey is ready to be loaded through the KEY
register. Alternatively, this procedure can be run in hardware by using the AES crypto module to
process a dummy data block in encryption mode using the same key. After the end of the
encryption, reading from the key memory allows the last subkey to be obtained; i.e., get the
result of the key expansion procedure.
key, depending on the mode (encryption or decryption) and status of the AES crypto module.
Table 25-1.
The AES module can trigger a DMA transfer when the encryption/decryption procedure is com-
plete. For more details on DMA transfer triggers, refer to
• In encryption mode, the key is the one defined in the AES standard.
• In decryption mode, the key is the last subkey of the expanded key defined in the AES
Same key as loaded
standard.
Before Data
Processing
The result of reading the key memory at different stages.
Encryption
address pointer
access to CTRL
4-bit key write
Reset pointer
reset or
generated from the
The last subkey
Processing
After Data
loaded key
Table 25-1 on page 319
KEY
14
15
0
1
-
Same key as loaded
Atmel AVR XMEGA AU
Before Data
Processing
”Transfer Triggers” on page
shows the results of reading the
address pointer
access to CTRL
4-bit key read
Reset pointer
Decryption
reset or
generated from the last
loaded subkey
The initial key
Processing
After Data
54.
319