ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 12
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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3.11
3.11.1
3.12
3.12.1
8210B–AVR–04/10
Accessing 16-bits Registers
Configuration Change Protection
Accessing 24- and 32-bit Registers
Sequence for write operation to protected I/O registers
The AVR data bus is 8-bit so accessing 16-bit registers requires atomic operations. These regis-
ters must be byte-accessed using two read or write operations. Due to this each 16-bit register
uses an 8-bit register for temporary storing the high byte during each write or read. A 16-bit reg-
ister is connected to the 8-bit bus and a temporary register using a 16-bit bus. This ensures that
the low- and high-byte of 16-bit registers is always accessed simultaneously when reading or
writing the register.
For a write operation, the low-byte of the 16-bit register must be written before the high-byte.
The low-byte is then written into the temporary register. When the high-byte of the 16-bit register
is written, the temporary register is copied into the low-byte of the 16-bit register in the same
clock cycle.
For a read operation, the low-byte of the 16-bit register must be read before the high-byte. When
the low byte register is read by the CPU, the high byte of the 16-bit register is copied into the
temporary register in the same clock cycle as the low byte is read. When the high-byte is read, it
is then read from the temporary register.
Interrupts can corrupt the timed sequence if the interrupt is triggered and try to access the same
16-bit register during an atomic 16-bit read/write operations. To prevent this, interrupts can be
disabled when writing or reading 16-bit registers.
The temporary registers can also be read and written directly from user software.
For 24- and 32-bit registers the read and write access is done in the same way as described for
16-bit registers, except there are two temporary registers for 24-bit register and three for 32-bit
registers. The least significant byte must be written first when doing a write, and read first when
doing a read.
System critical I/O register settings are protected from accidental modification. The SPM instruc-
tion is protected from accidental execution, and the LPM instruction is protected when reading
the fuses and signature row. This is handled globally by the Configuration Change Protection
(CCP) register. Changes to the protected I/O registers or bit, or execution of the protected
instructions are only possible after the CPU writes a signature to the CCP register. The different
signatures is described the register description.
There are 2 mode of operation, one for protected I/O registers and one for protected SPM/LPM.
1. The application code writes the signature for change enable of protected I/O registers
2. Within 4 instruction cycles, the application code must write the appropriate data to the
to the CCP register.
protected register. Most protected registers also contain a write enable/change enable
bit. This bit must be written to one in the same operation as the data is written. The pro-
tected change is immediately disabled if the CPU performs write operations to the I/O
register or data memory, or if the instruction SPM, LPM or SLEEP is executed.
XMEGA D
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