ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 132
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Price
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12.8.1
12.8.2
12.8.3
8210B–AVR–04/10
Waveform Generation
Frequency (FRQ) Waveform Generation
Single Slope PWM Generation
The compare channels can be used for waveform generation on the corresponding port pins. To
make the waveform visible on the connected port pin, the following requirements must be
fulfilled:
Inverted waveform output can be achieved by setting the invert output bit for the port pin.
For frequency generation the period time (T) is controlled by the CCA register instead of PER,
which in this case is not in use. The Waveform Generation (WG) output is toggled on each com-
pare match between the CNT and CCA registers as shown in
Figure 12-12. Frequency Waveform Generation
The waveform generated will have a maximum frequency of half of the Peripheral clock fre-
quency (f
Extension since this only increase the resolution and not the frequency. The waveform fre-
quency (f
where N represents the prescaler divider used (1, 2, 4, 8, 64, 256, 1024, or event channel n).
For single slope PWM generation, the Period (T) is controlled by the PER, while CCx registers
control the duty cycle of the WG output.
TOM to TOP then restarts from BOTTOM. The waveform generator (WG) output is set on the
compare match between the CNT and CCx registers, and cleared at TOP.
f
FRQ
1. A waveform generation mode must be selected.
2. Event actions must be disabled.
3. The CC channels to be used must be enabled. This will override the corresponding port
4. The direction for the associated port pin must be set to output.
CNT
WG Output
=
pin output register.
------------------------------- -
2N CCA+1
FRQ
PER
(
f
PER
MAX
BOT
TOP
)is defined by the following equation:
) when CCA is set to zero (0x0000). This also applies when using the Hi-Res
)
Period (T)
Figure 12-13
Direction Change
shows how the counter counts from BOT-
Figure 12-12 on page
CNT written
XMEGA D
"update"
132.
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