RM9200 Atmel Corporation, RM9200 Datasheet - Page 85

• Manufacturer Part Number: RM9200
• Manufacturer: Atmel Corporation

Specifications of RM9200

• Flash (kbytes): 0 Kbytes
• Pin Count: 256
• Max. Operating Frequency: 180 MHz
• Cpu: ARM920
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 122
• Ext Interrupts: 122
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 1
• Twi (i2c): 1
• Uart: 5
• Ssc: 3
• Ethernet: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

5.12 The behavior of the program counter during debug
5.12.1
5.12.2
ARM DDI 0180A
Breakpoint
Watchpoint
To force the ARM9TDMI to branch back to the place at which program flow was
interrupted by debug, the debugger must keep track of what happens to the PC. There
are six cases:
•
•
•
•
•
•
In each case the same equation is used to determine where to resume execution. These
are explained below.
Entry to debug state from a breakpointed instruction advances the PC by 16 bytes in
ARM state, or 8 bytes in Thumb state. Each instruction executed in debug state
advances the PC by one address. The normal way to exit from debug state after a
breakpoint is to remove the breakpoint, and branch back to the previously breakpointed
address.
For example, if the ARM9TDMI entered debug state from a breakpoint set on a given
address and two debug speed instructions were executed, a branch of 7 addresses must
occur (four for debug entry, plus two for the instructions, plus one for the final branch).
The following sequence shows ARM instructions scanned into scan chain 1. This is the
Most Significant Bit (MSB) first, so the first digit represents the value to be scanned into
the SYSSPEED bit, followed by the instruction.
0 EAFFFFF9 ; B -7 addresses (two’s complement)
1 E1A00000 ; NOP (MOV R0, R0), SYSSPEED bit is set
For small branches, the final branch could be replaced with a subtract with the PC as
the destination. For example,
Returning to the program execution after entering debug state from a watchpoint is done
in the same way as the procedure described in Breakpoint on page 5-35 above. Debug
entry adds four addresses to the PC, and every instruction adds one address. Since the
instruction after that which caused the watchpoint has executed, instruction execution
will resume at the one after that.
Breakpoint.
Watchpoint.
Watchpoint with another exception on page 5-36.
Watchpoint and breakpoint on page 5-36.
Debug request on page 5-36.
System speed accesses on page 5-37.
© Copyright ARM Limited 2000. All rights reserved.
SUB PC, PC, #28
for ARM code.
5-35