AD9125 Analog Devices, AD9125 Datasheet - Page 43
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AD9125
Manufacturer Part Number
AD9125
Description
Manufacturer
Analog Devices
Datasheet
1.AD9125.pdf
(56 pages)
Specifications of AD9125
Resolution (bits)
16bit
Dac Update Rate
1GSPS
Dac Settling Time
n/a
Max Pos Supply (v)
+3.47V
Single-supply
No
Dac Type
Current Out
Dac Input Format
Par
Figure 68 shows the most basic DAC output circuitry. A pair of
resistors, R
currents to a differential voltage output, V
outputs of the DAC are high impedance, the differential driving
point impedance of the DAC outputs, R
Figure 69 illustrates the output voltage waveforms.
The common-mode signal voltage, V
The peak output voltage, V
With this circuit configuration, the single-ended peak voltage is
the same as the peak differential output voltage.
Transmit DAC Linear Output Signal Swing
To achieve optimum performance, the DAC outputs have a linear
output compliance voltage range that must be adhered to. The
linear output signal swing is dependent on the full-scale output
current, I
Figure 70 and Figure 71 show the IMD performance vs. the
common-mode output voltage at various full-scale currents and
output frequencies.
V
V
PEAK
–V
CM
V
PEAK
PEAK
V
OUTFS
=
CM
O
= I
, is used to convert each of the complementary output
0
I
2
Figure 68. Basic Transmit DAC Output Circuit
FS
FS
, and the common-mode level of the output.
V
× R
×
Figure 69. Voltage Output Waveforms
N
R
O
O
PEAK
IOUT1P
IOUT1N
IOUT2P
IOUT2N
V
P
, is calculated as
R
R
R
R
O
O
O
O
CM
, is calculated as
OUT
OUT
V
V
V
V
IP
IN
QP
QN
V
V
V
. Because the current
OUT
, is equal to 2 × R
OUTQ
OUTI
+
–
+
–
O
Rev. 0 | Page 43 of 56
.
AUXILIARY DAC OPERATION
The AD9125 has two auxiliary DACs; one is associated with the
I path, and the other is associated with the Q path. These auxiliary
DACs can be used to compensate for dc offsets in the transmitted
signal. Each auxiliary DAC has a single-ended current that can sink
or source current into either the P or N output of the associated
transmit DAC. The auxiliary DAC structure is shown in Figure 72.
The control registers for controlling the I and Q auxiliary DACs are
in Register 0x42, Register 0x43, Register 0x46, and Register 0x47.
Figure 71. IMD vs. Common-Mode Output Voltage (f
Figure 70. IMD vs. Common-Mode Output Voltage (f
–60
–65
–70
–75
–80
–85
–90
–50
–55
–60
–65
–70
–75
–80
–85
R
R
0
0
LOAD
LOAD
= 50 Ω differential, I
= 50 Ω differential, I
10mA
20mA
30mA
10mA
20mA
30mA
0.2
0.2
DIRECTION
CURRENT
AUX DAC
AUX DAC
AUX DAC
Figure 72. Auxiliary DAC Structure
I DAC
SIGN
0.4
0.4
AVDD3
0.6
0.6
FS
FS
V
V
CMD
CMD
= 10 mA, 20 mA, and 30 mA)
= 10 mA, 20 mA, and 30 mA)
(V)
(V)
0.8
0.8
IOUTP
IOUTN
1.0
1.0
OUT
OUT
1.2
1.2
= 161 MHz,
= 61 MHz,
AD9125
1
1
.4
.4