ADUC7124 Analog Devices, ADUC7124 Datasheet - Page 16
ADUC7124
Manufacturer Part Number
ADUC7124
Description
Precision Analog Microcontroller, 12-Bit Analog I/O, Large Memory, ARM7TDMI MCU with Enhanced IRQ Handler
Manufacturer
Analog Devices
Datasheet
1.ADUC7126.pdf
(104 pages)
Specifications of ADUC7124
Mcu Core
ARM7 TDMI
Mcu Speed (mips)
40
Sram (bytes)
32000Bytes
Gpio Pins
30
Adc # Channels
12
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7124BCPZ126
Manufacturer:
AD
Quantity:
349
Company:
Part Number:
ADUC7124BCPZ126
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Company:
Part Number:
ADUC7124BCPZ126-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADuC7124/ADuC7126
Pin No.
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
Mnemonic
IRQ1/P0.5/ADC
P2.0/SPM9/PLAO[5]/CONV
P0.7/ECLK/XCLK/SPM8/PLAO[4]/SIN0
IOGND
IOV
P3.6/PWM
P3.7/PWM
P1.7/SPM7/DTR/SPICS
P1.6/SPM6/PLAI[6]
P4.0/PLAO[8]/SIN1
P4.1/PLAO[9]/SOUT1
P1.5/SPM5/DCD/SPIMISO/PLAI[5]/IRQ3
P1.4/SPM4/RI/SPICLK/PLAI[4]/IRQ2
P1.3/SPM3/CTS/I2C1SDA/PLAI[3]
P1.2/SPM2/RTS/I2C1SCL/PLAI[2]
DD
TRIP
SYNC
/PLAI[14]
/PLAI[15]
BUSY
/PLAO[2]
/PLAO[0]
START
/SOUT0
Description
Multifunction I/O Pin.
External Interrupt Request 1, Active High (IRQ1).
General-Purpose Input and Output Port 0.5 (P0.5).
ADC
Programmable Logic Array Output Element 2 (PLAO[2]).
General-Purpose Input and Output Port 2.0 (P2.0).
Serial Port Multiplexed (SPM9).
Programmable Logic Array Output Element 5 (PLAO[5]).
Start Conversion Input Signal for ADC (
UART0 Output (SOUT0).
General-Purpose Input and Output Port 0.7 (P0.7).
Output for External Clock Signal (ECLK).
Input to the Internal Clock Generator Circuits (XCLK).
Serial Port Multiplexed (SPM8).
Programmable Logic Array Output Element 4 (PLAO[4]).
UART0 Input (SIN0).
Ground for GPIO. Typically connected to DGND.
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
General-Purpose Input and Output Port 3.6 (P3.6).
PWM Safety Cutoff (PWM
Programmable Logic Array Input Element 14 (PLAI[14]).
General-Purpose Input and Output Port 3.7 (P3.7).
PWM Synchronization Input/Output (PWM
Programmable Logic Array Input Element 15 (PLAI[15]).
General-Purpose Input and Output Port 1.7 (P1.7).
Serial Port Multiplexed. UART, SPI (SPM7).
Data Terminal Ready (DTR).
Chip Select (SPI
Programmable Logic Array Output Element 0 (PLAO[0]).
General-Purpose Input and Output Port 1.6 (P1.6).
Serial Port Multiplexed (SPM6).
Programmable Logic Array Input Element 6 (PLAI[6]).
General-Purpose Input and Output Port 4.0 (P4.0).
Programmable Logic Array Output Element 8 (PLAO[8]).
UART1 Input (SIN1).
General-Purpose Input and Output Port 4.1 (P4.1).
Programmable Logic Array Output Element 9 (PLAO[9]).
UART1 Output (SOUT1).
General-Purpose Input and Output Port 1.5 (P1.5).
Serial Port Multiplexed. UART, SPI (SPM5).
Data Carrier Detect (DCD).
Master Input, Slave Output (SPIMISO).
Programmable Logic Array Input Element 5 (PLAI[5]).
External Interrupt Request 3, Active High (IRQ3).
General-Purpose Input and Output Port 1.4 (P1.4).
Serial Port Multiplexed. UART, SPI (SPM4).
Ring Indicator (RI).
Serial Clock Input/Output (SPICLK).
Programmable Logic Array Input Element 4 (PLAI[4]).
External Interrupt Request 2, Active High (IRQ2).
General-Purpose Input and Output Port 1.3 (P1.3).
Serial Port Multiplexed. UART, I2C1 (SPM3).
Clear to Send (CTS).
I2C1 (I2C1SDA).
Programmable Logic Array Input Element 3 (PLAI[3]).
General-Purpose Input and Output Port 1.2 (P1.2).
Serial Port Multiplexed (SPM2).
Ready to Send (RTS).
I2C1 (I2C1SCL).
Programmable Logic Array Input Element 2 (PLAI[2]).
BUSY
Rev. B | Page 16 of 104
Signal Output (ADC
CS).
TRIP
BUSY
).
).
CONV
SYNC
).
START
).